SPC56EL54L3BCFSY datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> SPC56EL54L3BCFSY

SPC56EL54L3BCFSY: DescriptionMICROCONTROLLER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，165 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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SPC56EL54L3BCFSY Overview

MICROCONTROLLER

SPC56EL54L3BCFSY Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	1247957071
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Has ADC	YES
Address bus width	32
bit size	32
CPU series	SPC56
maximum clock frequency	40 MHz
DMA channel	YES
External data bus width	64
JESD-30 code	S-PQFP-G100
length	14 mm
Number of I/O lines	16
Number of terminals	100
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP100,.63SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
power supply	3.3 V
Certification status	Not Qualified
RAM (bytes)	98304
rom(word)	786432
ROM programmability	FLASH
speed	80 MHz
Maximum slew rate	279 mA
Maximum supply voltage	3.63 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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SPC56EL60x, SPC56EL54x,

SPC564L60x, SPC564L54x

32-bit Power Architecture® microcontroller for automotive

SIL3/ASILD chassis and safety applications

Datasheet

production data

LQFP144 (20 x 20 x 1.4 mm)

LQFP100 (14 x 14x 1.4 mm)

–

Replicated junction temperature sensor

Non-maskable interrupt (NMI)

16-region memory protection unit (MPU)

Clock monitoring units (CMU)

Power management unit (PMU)

Cyclic redundancy check (CRC) unit

LFBGA257 (14 x 14 mm)



Decoupled Parallel mode for high-performance

use of replicated cores



Nexus Class 3+ interface



Interrupts

– Replicated 16-priority controller

– Replicated 16-channel eDMA controller



GPIOs individually programmable as input,

output or special function



Three 6-channel general-purpose eTimer units



2 FlexPWM units

– Four 16-bit channels per module



Communications interfaces

– 2 LINFlexD channels

– 3 DSPI channels with automatic chip select

generation

– 2 FlexCAN interfaces (2.0B Active) with 32

message objects

– FlexRay module (V2.1 Rev. A) with 2

channels, 64 message buffers and data

rates up to 10 Mbit/s



Two 12-bit analog-to-digital converters (ADCs)

– 16 input channels

– Programmable cross triggering unit (CTU)

to synchronize ADCs conversion with timer

and PWM



Sine wave generator (D/A with low pass filter)



On-chip CAN/UART bootstrap loader



Single 3.0 V to 3.6 V voltage supply



Ambient temperature range –40 °C to 125 °C



Junction temperature range –40 °C to 150 °C

Features



High-performance e200z4d dual core



32-bit Power Architecture® technology CPU



Core frequency as high as 120 MHz



Dual issue five-stage pipeline core



Variable Length Encoding (VLE)



Memory Management Unit (MMU)



4 KB instruction cache with error detection

code



Signal processing engine (SPE)



Memory available

– 1 MB flash memory with ECC

– 128 KB on-chip SRAM with ECC

– Built-in RWW capabilities for EEPROM

emulation



SIL3/ASILD innovative safety concept:

LockStep mode and Fail-safe protection

– Sphere of replication (SoR) for key

components (such as CPU core, eDMA,

crossbar switch)

– Fault collection and control unit (FCCU)

– Redundancy control and checker unit

(RCCU) on outputs of the SoR connected

to FCCU

– Boot-time Built-In Self-Test for Memory

(MBIST) and Logic (LBIST) triggered by

hardware

– Boot-time Built-In Self-Test for ADC and

flash memory triggered by software

July 2015

This is information on a product in full production.

DocID15457 Rev 12

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www.st.com

Contents

SPC56ELx, SPC564Lx

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1

1.2

1.3

1.4

1.5

Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.5.1

1.5.2

1.5.3

1.5.4

1.5.5

1.5.6

1.5.7

1.5.8

1.5.9

1.5.10

1.5.11

1.5.12

1.5.13

1.5.14

1.5.15

1.5.16

1.5.17

1.5.18

1.5.19

1.5.20

1.5.21

1.5.22

1.5.23

1.5.24

1.5.25

1.5.26

1.5.27

High-performance e200z4d core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Crossbar switch (XBAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Memory Protection Unit (MPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Enhanced Direct Memory Access (eDMA) . . . . . . . . . . . . . . . . . . . . . . 15

On-chip flash memory with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

On-chip SRAM with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Platform flash memory controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Platform Static RAM Controller (SRAMC) . . . . . . . . . . . . . . . . . . . . . . . 17

Memory subsystem access time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Error Correction Status Module (ECSM) . . . . . . . . . . . . . . . . . . . . . . . . 18

Peripheral bridge (PBRIDGE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Interrupt Controller (INTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

System clocks and clock generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Frequency-Modulated Phase-Locked Loop (FMPLL) . . . . . . . . . . . . . . 21

Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Internal Reference Clock (RC) oscillator . . . . . . . . . . . . . . . . . . . . . . . . 21

Clock, reset, power, mode and test control modules (MC_CGM,

MC_RGM, MC_PCU, and MC_ME) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Periodic Interrupt Timer Module (PIT) . . . . . . . . . . . . . . . . . . . . . . . . . . 22

System Timer Module (STM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Software Watchdog Timer (SWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Fault Collection and Control Unit (FCCU) . . . . . . . . . . . . . . . . . . . . . . . 23

System Integration Unit Lite (SIUL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Non-Maskable Interrupt (NMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Boot Assist Module (BAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

System Status and Configuration Module (SSCM) . . . . . . . . . . . . . . . . 24

FlexCAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

FlexRay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

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1.5.28

1.5.29

1.5.30

1.5.31

1.5.32

1.5.33

1.5.34

1.5.35

1.5.36

1.5.37

1.5.38

1.5.39

1.5.40

1.5.41

Contents

Serial communication interface module (LINFlexD) . . . . . . . . . . . . . . . 26

Deserial Serial Peripheral Interface (DSPI) . . . . . . . . . . . . . . . . . . . . . . 26

FlexPWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

eTimer module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Sine Wave Generator (SWG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Analog-to-Digital Converter module (ADC) . . . . . . . . . . . . . . . . . . . . . . 29

Cross Triggering Unit (CTU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Cyclic Redundancy Checker (CRC) Unit . . . . . . . . . . . . . . . . . . . . . . . . 30

Redundancy Control and Checker Unit (RCCU) . . . . . . . . . . . . . . . . . . 30

Junction temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Nexus Port Controller (NPC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

IEEE 1149.1 JTAG Controller (JTAGC) . . . . . . . . . . . . . . . . . . . . . . . . . 32

Voltage regulator / Power Management Unit (PMU) . . . . . . . . . . . . . . . 33

Built-In Self-Test (BIST) capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . 34

2.1

2.2

2.3

2.4

Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

3.12

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Decoupling capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

3.5.1

General notes for specifications at maximum junction temperature . . 104

Electromagnetic Interference (EMI) characteristics . . . . . . . . . . . . . . . . 106

Electrostatic discharge (ESD) characteristics . . . . . . . . . . . . . . . . . . . . 107

Static latch-up (LU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Voltage regulator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . 108

DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113

Temperature sensor electrical characteristics . . . . . . . . . . . . . . . . . . . . .115

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Contents

SPC56ELx, SPC564Lx

3.13

3.14

3.15

3.16

3.17

3.18

3.19

3.20

Main oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .116

FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118

16 MHz RC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . .119

ADC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119

3.16.1

Input Impedance and ADC Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . 120

Flash memory electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 125

SWG electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

3.19.1

3.20.1

3.20.2

3.20.3

3.20.4

3.20.5

Pad AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

Reset sequence duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

Reset sequence description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

Reset sequence trigger mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

Reset sequence — start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

External watchdog window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

RESET pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

WKUP/NMI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

IEEE 1149.1 JTAG interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

Nexus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

External interrupt timing (IRQ pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

Reset sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

3.21

AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

3.21.1

3.21.2

3.21.3

3.21.4

3.21.5

3.21.6

Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

4.1

4.2

ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154

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List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Table 44.

Table 45.

SPC56ELx/SPC564Lx device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Platform memory access time summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

LQFP100 pin function summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

LQFP144 pin function summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

LFBGA257 pin function summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Recommended operating conditions (3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Decoupling capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Thermal characteristics for LQFP100 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Thermal characteristics for LQFP144 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Thermal characteristics for LFBGA257 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

EMI configuration summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

EMI emission testing specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

ESD ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Latch-up results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Voltage regulator electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Current consumption characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Temperature sensor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Main oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

16 MHz RC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

ADC conversion characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

Flash memory program and erase electrical specifications . . . . . . . . . . . . . . . . . . . . . . . 125

Flash memory timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

Flash memory module life. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

SPC56XL60/54 SWG Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

Pad AC specifications (3.3 V, IPP_HVE = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

RESET sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

Reset sequence trigger — reset sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

Voltage Thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

RESET electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

WKUP/NMI glitch filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

JTAG pin AC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

Nexus debug port timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

External interrupt timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

LQFP100 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

LQFP144 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150

LFBGA257 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154

DocID15457 Rev 12

5/165

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