HD63PB05Y1 datasheet, PDF - EEWORLD Datasheet

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HD63PB05Y1: DescriptionCMOS MCU; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1016KB，31 Pages; ManufacturerHitachi （Renesas ）; Websitehttp://www.renesas.com/eng/

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HD63PB05Y1 Overview

CMOS MCU

HD63PB05Y1 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Hitachi （Renesas ）
Parts packaging code	DIP
package instruction	SHRINK, CERAMIC, PIGGY BACK, DIP-64
Contacts	64
Reach Compliance Code	unknow
Has ADC	NO
Address bus width	14
bit size	8
CPU series	6805
maximum clock frequency	8 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	R-CDIP-T64
JESD-609 code	e0
length	57.3 mm
Number of I/O lines	31
Number of terminals	64
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	NO
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	SDIP
Encapsulate equivalent code	SDIP64,.75
Package shape	RECTANGULAR
Package form	IN-LINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	256
rom(word)	8192
ROM programmability	EPROM
Maximum seat height	7.5 mm
speed	2 MHz
Maximum slew rate	10 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	1.778 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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HD63PB05Y1 Related Products

	HD63PB05Y1	HD63P05Y1	HD63PA05Y1
Description	CMOS MCU	CMOS MCU	CMOS MCU
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	Hitachi （Renesas ）	Hitachi （Renesas ）	Hitachi （Renesas ）
Parts packaging code	DIP	DIP	DIP
package instruction	SHRINK, CERAMIC, PIGGY BACK, DIP-64	SDIP, SDIP64,.75	SHRINK, CERAMIC, PIGGY BACK, DIP-64
Contacts	64	64	64
Reach Compliance Code	unknow	unknow	unknow
Has ADC	NO	NO	NO
Address bus width	14	14	14
bit size	8	8	8
CPU series	6805	6805	6805
maximum clock frequency	8 MHz	4 MHz	6 MHz
DAC channel	NO	NO	NO
DMA channel	NO	NO	NO
External data bus width	8	8	8
JESD-30 code	R-CDIP-T64	R-CDIP-T64	R-CDIP-T64
JESD-609 code	e0	e0	e0
length	57.3 mm	57.3 mm	57.3 mm
Number of I/O lines	31	31	31
Number of terminals	64	64	64
Maximum operating temperature	70 °C	70 °C	70 °C
PWM channel	NO	NO	NO
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	SDIP	SDIP	SDIP
Encapsulate equivalent code	SDIP64,.75	SDIP64,.75	SDIP64,.75
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE, SHRINK PITCH	IN-LINE, SHRINK PITCH	IN-LINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified
RAM (bytes)	256	256	256
rom(word)	8192	8192	8192
ROM programmability	EPROM	EPROM	EPROM
Maximum seat height	7.5 mm	7.5 mm	7.5 mm
speed	2 MHz	1 MHz	1.5 MHz
Maximum slew rate	10 mA	10 mA	10 mA
Maximum supply voltage	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V
surface mount	NO	NO	NO
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	1.778 mm	1.778 mm	1.778 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	15.24 mm	15.24 mm	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER

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