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AT24C04B_14

Description
Schmitt Trigger, Filtered Inputs for Noise Suppression
File Size272KB,28 Pages
ManufacturerAtmel (Microchip)
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AT24C04B_14 Overview

Schmitt Trigger, Filtered Inputs for Noise Suppression

Features
Low-voltage and Standard-voltage Operation
1.8 (V
CC
= 1.8V to 5.5V)
Internally Organized 512 x 8 (4K), or 1024 x 8 (8K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility
Write Protect Pin for Hardware Data Protection
16-byte Page (4K, 8K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
Endurance: 1 Million Write Cycles
Data Retention: 100 Years
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra-Thin Mini-MAP (MLP 2x3), 5-lead
SOT23, 8-lead TSSOP and 8-ball dBGA2 Packages
Lead-free/Halogen-free
Die Sales: Wafer Form and Tape and Reel
Two-wire
Serial EEPROM
4K (512 x 8)
8K (1024 x 8)
AT24C04B
AT24C08B
Description
The AT24C04B/08B provides 4096/8192 bits of serial electrically erasable and
programmable read-only memory (EEPROM) organized as 512/1024 words of 8 bits
each. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The AT24C04B/08B is
available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra-Thin Mini-
MAP (MLP 2x3), 5-lead SOT23, 8-lead TSSOP, and 8-ball dBGA2 packages and is
accessed via a Two-wire serial interface. In addition, the AT24C04B/08B is available in
1.8V (1.8V to 5.5V) version.
Figure 1. Pin Configurations
Pin Name
Description
8-lead Ultra-Thin
Mini-MAP (MLP 2x3)
V
CC
8
WP
7
SCL
6
SDA
5
1
A0
2
A1
3
A2
4
GND
Not Recommended
for New Design.
Replaced by
AT24C04C or
AT24C08C.
8-ball dBGA2
V
CC
WP
SCL
SDA
8
7
6
5
A0 – A2
SDA
SCL
WP
NC
GND
V
CC
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
Ground
Power Supply
A0
A1
3
A2
4
GND
1
2
Bottom View
8-lead TSSOP
A0
A1
A2
GND
1
2
3
4
8
7
6
5
Bottom View
8-lead SOIC
V
CC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
Note:
For use of 5-lead SOT23
4K:
The software A2 and A1 bits in the
device address word must be set to zero
to properly communicate.
8K:
The software A2 bit in the device
address word must be set to zero to
properly communicate.
5-lead SOT23
SCL
GND
SDA
1
2
3
4
5
8-lead PDIP
WP
A0
A1
A2
GND
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
V
CC
5226G–SEEPR–11/09

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