EEWORLDEEWORLDEEWORLD

Part Number

Search

WSFP1082130AB

Description
RES,SMT,THIN FILM,213 OHMS,100WV,.1% +/-TOL,-25,25PPM TC,0202 CASE
CategoryPassive components    The resistor   
File Size84KB,3 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric View All

WSFP1082130AB Overview

RES,SMT,THIN FILM,213 OHMS,100WV,.1% +/-TOL,-25,25PPM TC,0202 CASE

WSFP1082130AB Parametric

Parameter NameAttribute value
Objectid1220403280
package instructionSMT, 0202
Reach Compliance Codeunknown
ECCN codeEAR99
structureChip
Manufacturer's serial numberSFP
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package height0.254 mm
Package length0.558 mm
Package formSMT
Package width0.558 mm
method of packingTray
Rated power dissipation(P)0.25 W
GuidelineMIL-STD-883
resistance213 Ω
Resistor typeFIXED RESISTOR
seriesSFP
size code0202
technologyTHIN FILM
Temperature Coefficient-25,25 ppm/°C
Tolerance0.1%
Operating Voltage100 V
SFP
Vishay Electro-Films
CHIP
RESISTORS
Thin Film Top-Contact Resistor
with Part Mark
FEATURES
Wire bondable
Product may not
be to scale
Part marked - 5 digits
Small size: 0.022 inches square
Resistance range: 1
Ω
to 1 MΩ
DC power rating: 250 mW
Oxidized silicon substrate for good power dissipation
Resistor material: Tantalum nitride, self passivating
Moisture resistant
The SFP series single-value resistor chips offer a small size,
wide ohmic value range and excellent power capacity.
The SFPs are part marked with resistance value allowing
user the ability to visually determine the resistance value of
the chip.
The SFPs are manufactured using Vishay Electro-Films
(EFI) sophisticated thin film equipment and manufacturing
technology.
The SFPs are 100 % electrically tested and visually
inspected to MIL-STD-883.
APPLICATIONS
Vishay EFI SFP small resistor chips are widely used in hybrid packages where space is limited and chip value marking is
important for identification. The die is part marked with the resistance value. Wire bonding is made to the two pads on the top of
the chip.
TEMPERATURE COEFFICIENT OF RESISTANCE, VALUES AND TOLERANCES
Tightest Standard Tolerance Available
1%
0.5 %
PROCESS CODE
0.1 %
± 25 ppm/°C
± 50 ppm/°C
± 100 ppm/°C
± 250 ppm/°C
CLASS H*
103
102
101
100
CLASS K*
108
107
106
105
1
Ω
10
Ω
30
Ω
100
Ω
200 k
Ω
430 k
Ω
620 k
Ω
1 M
Ω
* MIL-PRF-38534 inspection criteria
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
Noise, MIL-STD-202, Method 308
100
Ω
- 250 kΩ
< 100
Ω
or > 251 kΩ
Moisture Resistance, MIL-STD-202
Method 106
Stability, 1000 h, + 125 °C, 125 mW
Operating Temperature Range
Thermal Shock, MIL-STD-202,
Method 107, Test Condition F
High Temperature Exposure, + 150 °C, 100 h
Dielectric Voltage Breakdown
Insulation Resistance
Operating Voltage
DC Power Rating at + 70 °C (Derated to Zero at + 175 °C)
5 x Rated Power Short-Time Overload, + 25 °C, 5 s
Values above 1M available
www.vishay.com
40
For technical questions, contact: ff2bresistors@vishay.com
Document Number: 61000
Revision: 07-Mar-08
- 35 dB typ.
- 20 dB typ.
± 0.5 % max.
ΔR/R
± 0.25 % max.
ΔR/R
- 55 °C to + 125 °C
± 0.25 % max.
ΔR/R
± 0.5 % max.
ΔR/R
200 V
10
12
min.
100 V max.
250 mW
± 0.25 % max.
ΔR/R
You can learn my profound inner skills in your spare time.
[hide][/hide]...
gaoyang9992006 Talking
Only use launchpad board and proteus 8.0 to test ssi data transmission program
[i=s]This post was last edited by Pinghu Qiuyue on 2014-3-6 10:03[/i] This is a method that can be used as a reference for forum friends who don’t have a board. At the same time, the experiment can al...
平湖秋月 Microcontroller MCU
How about a cortex M3 or M4 board?
2nd hand evaluation board··the kind with built-in simulation··poor students, you know, please post the picture with the price, qq is the ID...
595818431 Buy&Sell
Mark point design specifications
...
静若幽兰 PCB Design
How to reasonably choose capacitor step-down components
[color=black][font=Verdana] In the production of [/font][font=Verdana] electronics, in order to reduce the volume and reduce the cost, the capacitor step-down method is often used to replace the bulky...
qwqwqw2088 Analogue and Mixed Signal
Structure of Verilog Testbench
module test ; reg clk , rst ; reg [7:0] your ; right and ; wire [7:0] dout ;initial begin clk=0; rst=0; en=0; your=8'b0; #10; rst=1; en=1; from=8'b1; #10 din=8'b2; ....... end always begin#10 clk=~clk...
eeleader FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 835  202  631  1286  2570  17  5  13  26  52 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号