LP621024E Series
128K X 8 BIT CMOS SRAM
Document Title
128K X 8 BIT CMOS SRAM
Revision History
Rev. No.
0.0
1.0
History
Initial issue
Final version release
Issue Date
August 20, 2008
September 21, 2010
Remark
Preliminary
Final
(September, 2010, Version 1.0)
AMIC Technology, Corp.
LP621024E Series
128K X 8 BIT CMOS SRAM
Features
Single +5V power supply
Access times: 55/70 ns (max.)
Current:
Very low power version: Operating: 70mA (max.)
Standby:
25μA (max.)
Full static operation, no clock or refreshing required
All inputs and outputs are directly TTL-compatible
Common I/O using three-state output
Output enable and two chip enable inputs for easy
application
Data retention voltage: 2V (min.)
Available in 32-pin SOP, TSOP and TSSOP
(8 X 13.4mm) packages
Pb-Free package only
All Pb-free (Lead-free) products are RoHS compliant
General Description
The LP621024E is a low operating current 1,048,576-bit
static random access memory organized as 131,072 words
by 8 bits and operates on a single 5V power supply.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Two chip enable inputs are provided for POWER-DOWN
and device enable and an output enable input is included
for easy interfacing.
Data retention is guaranteed at a power supply voltage as
low as 2V.
Product Family
Product Family
Operating
Temperature
0°C ~ +70°C
VCC
Range
4.5V~5.5V
Power Dissipation
Speed
Data Retention
(I
CCDR
, Typ.)
0.5μA
Standby
(I
SB1
, Typ.)
2μA
Operating
(I
CC2
, Typ.)
10mA
Package Type
LP621024E
55ns / 70ns
32L SOP
/TSOP/TSSOP
1. Typical values are measured at VCC = 5.0V, T
A
= 25°C and not 100% tested.
2. Data retention current VCC = 2.0V.
Pin Configurations
SOP
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
1
I/O
2
I/O
3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
17
32
16
1
TSOP/(TSSOP)
(September, 2010, Version 1.0)
LP621024EM
LP621024EV
(LP621024EX)
Pin No.
Pin
Name
Pin No.
Pin
Name
1
A11
17
A3
2
A9
18
A2
3
A8
19
A1
4
A13
20
A0
5
WE
21
I/O
1
6
CE2
22
I/O
2
7
A15
23
I/O
3
8
VCC
24
9
NC
25
10
A16
26
I/O
5
11
A14
27
I/O
6
12
A12
28
I/O
7
13
A7
29
I/O
8
14
A6
30
CE1
15
A5
31
A10
16
A4
32
OE
GND I/O
4
1
AMIC Technology, Corp.
LP621024E Series
Block Diagram
A0
VCC
GND
A14
A15
A16
512 X 2048
DECODER
MEMORY ARRAY
I/O
1
INPUT DATA
CIRCUIT
SENSE AMPS
I/O
8
CE2
CE1
OE
WE
CONTROL
CIRCUIT
Pin Descriptions - SOP
Pin No.
1
2 - 12, 23,
25 - 28, 31
13 - 15,
17 - 21
16
22
Symbol
NC
A0 - A16
Description
No Connection
Address Inputs
Pin Description - TSOP/TSSOP
Pin No.
Symbol
Description
1 - 4, 7,
10 - 20, 31
5
6
8
9
21 - 23,
25 - 29
24
30
A0 - A16
WE
CE2
VCC
NC
I/O
1
- I/O
8
GND
Address Inputs
Write Enable
Chip Enable
Power Supply
No Connection
Data Input/Outputs
Ground
I/O
1
- I/O
8
GND
Data Input/Outputs
Ground
CE1
OE
WE
CE2
VCC
Chip Enable
Output Enable
Write Enable
Chip Enable
Power Supply (+5V)
24
29
30
32
CE1
OE
Chip Enable
Output Enable
32
(September, 2010, Version 1.0)
2
AMIC Technology, Corp.
LP621024E Series
Recommended DC Operating Conditions
(T
A
= 0
°
C to +70
°
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
GND
V
IH
V
IL
C
L
TTL
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Output Load
Output Load
4.5
0
2.2
-0.3
-
-
5.0
0
3.5
0
-
-
5.5
0
VCC + 0.3
+0.8
30
1
V
V
V
V
pF
-
Absolute Maximum Ratings*
VCC to GND ..............................................-0.5V to + 6.0V
IN, IN/OUT Volt to GND.................... -0.5V to VCC + 0.5V
Operating Temperature, Topr ..................... 0
°
C to + 70
°
C
Storage Temperature, Tstg.................... -55
°
C to + 125
°
C
Temperature Under Bias, Tbias............... -10
°
C to + 85
°
C
Power Dissipation, P
T
............................................. 0.7W
Soldering Temp. & Time ............................. 260
°
C, 10 sec
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute maximum
rating conditions for extended periods may affect device
reliability.
DC Electrical Characteristics
Symbol
Parameter
(T
A
= 0
°
C to +70
°
C, VCC = 5V
±
10%, GND = 0V)
LP621024E-55LL
Min.
Max.
LP621024E-70LL
Min.
Max.
Unit
Conditions
⎜
I
LI
⎥
Input Leakage
Current
-
1
-
1
μ
A
V
IN
= GND to VCC
CE1 = V
IH
or CE2 = V
IL
or OE = V
IH
or WE = V
IL
V
I/O
= GND to VCC
CE1 = V
IL
, CE2 = V
IH
I
I/O
= 0mA
Min. Cycle, Duty = 100%
CE1 = V
IL
, CE2 = V
IH
I
I/O
= 0mA
CE1 = V
IL
, CE2 = V
IH
V
IH
= VCC, V
IL
= 0V
f = 1MH
Z,
I
I/O
= 0mA
⎜
I
LO
⎥
Output Leakage
Current
Active Power
Supply Current
-
1
-
1
μ
A
I
CC
-
15
-
15
mA
I
CC1
Dynamic
Operating
Current
-
70
-
70
mA
I
CC2
-
15
-
15
mA
(September, 2010, Version 1.0)
3
AMIC Technology, Corp.
LP621024E Series
DC Electrical Characteristics (continued)
Symbol
Parameter
LP621024E-55LL
Min.
Max.
LP621024E-70LL
Min.
Max.
Unit
Conditions
I
SB
-
2
-
2
mA
CE1 = V
IH
or CE2 =V
IL
CE1
≥
VCC - 0.2V
CE2
≥
VCC - 0.2V
V
IN
≥
0V
CE2
≤
0.2V
V
IN
≥
0V
I
OL
= 2.1mA
I
SB1
Standby Power
Supply Current
-
25
-
25
μ
A
I
SB2
Output Low
Voltage
Output High
Voltage
-
25
-
25
μ
A
V
OL
-
0.4
-
0.4
V
V
OH
2.4
-
2.4
-
V
I
OH
= -1.0mA
Truth Table
Mode
CE1
CE2
OE
WE
I/O Operation
Supply Current
Standby
H
X
X
L
H
H
H
X
X
H
L
X
X
X
H
H
L
High Z
High Z
High Z
D
OUT
D
IN
I
SB
, I
SB1
I
SB
, I
SB2
I
CC,
I
CC1,
I
CC2
I
CC,
I
CC1,
I
CC2
I
CC,
I
CC1,
I
CC2
Output Disable
Read
Write
Note: X = H or L
L
L
L
Capacitance
(T
A
= 25
°
C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
C
IN
*
C
I/O
*
Input Capacitance
Input/Output Capacitance
6
8
pF
pF
V
IN
= 0V
V
I/O
= 0V
* These parameters are sampled and not 100% tested.
(September, 2010, Version 1.0)
4
AMIC Technology, Corp.
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