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SN74GTLP1395DWR

Description
Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-SOIC -40 to 85
Categorylogic    logic   
File Size1MB,25 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
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SN74GTLP1395DWR Overview

Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-SOIC -40 to 85

SN74GTLP1395DWR Parametric

Parameter NameAttribute value
Brand NameTexas Instruments
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP, SOP20,.4
Contacts20
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time1 week
Is SamacsysN
Control typeINDEPENDENT CONTROL
Counting directionBIDIRECTIONAL
seriesGTLP
JESD-30 codeR-PDSO-G20
JESD-609 codee4
length12.8 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS TRANSCEIVER
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of digits1
Number of functions2
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityCONFIGURABLE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTR
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Maximum supply current (ICC)20 mA
propagation delay (tpd)6.3 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)3.45 V
Minimum supply voltage (Vsup)3.15 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
translateGTLP & LVTTL
width7.5 mm
Base Number Matches1

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Description Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-SOIC -40 to 85 Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-TSSOP -40 to 85 Translation - Voltage Levels 2 1-Bit LVTTL/GTLP Bus Xcvr Adj-Eg-Rate Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-TSSOP -40 to 85 Translation - Voltage Levels Quad Bus Buffer Gate With 3-State Outputs Translation - Voltage Levels Quad Bus Buff Gate W/3-St Otpt
Is it lead-free? Lead free Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to conform to
Parts packaging code SOIC TSSOP TSSOP TSSOP TSSOP SOIC
package instruction SOP, SOP20,.4 TSSOP, TSSOP20,.25 TSSOP, TSSOP20,.25 TSSOP, TSSOP20,.25 TSSOP, TSSOP20,.25 SOP, SOP20,.4
Contacts 20 20 20 20 20 20
Reach Compliance Code compliant compliant unknow compliant unknow unknow
Control type INDEPENDENT CONTROL INDEPENDENT CONTROL INDEPENDENT CONTROL INDEPENDENT CONTROL INDEPENDENT CONTROL INDEPENDENT CONTROL
Counting direction BIDIRECTIONAL BIDIRECTIONAL BIDIRECTIONAL BIDIRECTIONAL BIDIRECTIONAL BIDIRECTIONAL
series GTLP GTLP GTLP GTLP GTLP GTLP
JESD-30 code R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609 code e4 e4 e4 e4 e4 e4
length 12.8 mm 6.5 mm 6.5 mm 6.5 mm 6.5 mm 12.8 mm
Logic integrated circuit type BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER
MaximumI(ol) 0.024 A 0.024 A 0.1 A 0.024 A 0.1 A 0.1 A
Humidity sensitivity level 1 1 1 1 1 1
Number of digits 1 1 1 1 1 1
Number of functions 2 2 2 2 2 2
Number of ports 2 2 2 2 2 2
Number of terminals 20 20 20 20 20 20
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity CONFIGURABLE CONFIGURABLE CONFIGURABLE CONFIGURABLE CONFIGURABLE CONFIGURABLE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP TSSOP TSSOP TSSOP TSSOP SOP
Encapsulate equivalent code SOP20,.4 TSSOP20,.25 TSSOP20,.25 TSSOP20,.25 TSSOP20,.25 SOP20,.4
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
method of packing TR TUBE TUBE TR TR TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Maximum supply current (ICC) 20 mA 20 mA 20 mA 20 mA 20 mA 20 mA
propagation delay (tpd) 6.3 ns 6.3 ns 6.3 ns 6.3 ns 6.3 ns 6.3 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 2.65 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 2.65 mm
Maximum supply voltage (Vsup) 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V
Minimum supply voltage (Vsup) 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
translate GTLP & LVTTL GTLP & LVTTL GTLP & LVTTL GTLP & LVTTL GTLP & LVTTL GTLP & LVTTL
width 7.5 mm 4.4 mm 4.4 mm 4.4 mm 4.4 mm 7.5 mm
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