EEWORLDEEWORLDEEWORLD

Part Number

Search

HCC4043

Description
QUAD 3-STATE R-S LATCHES
File Size285KB,13 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet View All

HCC4043 Overview

QUAD 3-STATE R-S LATCHES

HCC/HCF4043B
HCC/HCF4044B
QUAD 3-STATE R-S LATCHES
QUAD NOR
QUAD NAND
.
.
.
.
.
.
.
.
R-S LATCH-4043B
R-S LATCH-4044B
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
3-LEVEL OUTPUTS WITH COMMON OUTPUT
ENABLE
SEPARATE SET AND RESET INPUT FOR
EACH LATCH
5V, 10V, AND 15V PARAMETRIC RATINGS
NOR AND NAND CONFIGURATIONS
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N° 13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40XXBF
HCF40XXBM1
HCF40XXBEY
HCF40XXBC1
PIN CONNECTIONS
4043B
DESCRIPTION
The
HCC4043B, HCC4044B,
(extended tempera-
ture range) and the
HCF4043B, HCF4044B
(inter-
mediate temperature range) are monolithic
integrated circuits, available in 16-lead dual in-line
plastic or ceramic package and plastic micropack-
age. The
HCC/HCF4043B
types are quad cross-
coupled 3-state COS/MOS NOR latches and the
HCC/HCF4044B
types are quad cross-coupled 3-
state COS/MOS NAND latches. Each latch has a
separate Q output and individual SET and RESET
inputs. The Q outputs are controlled by a common
ENABLE input. A logic ”1” or ”high” on the ENABLE
input connects the latch states to the Q outputs. A
logic ”0” or ”low” on the ENABLE input disconnects
the latch states from the Q outputs, resulting in an
open circuit condition on the Q outputs. The open
circuit feature allows common bussing of the out-
puts.
June 1989
4044B
1/13
Urgent recruitment!!!
Job Requirements:1. Execute RF test cases for TD-SCDMA Node B2. Organize and develop HW at board level RF test environment. 3. Responsible for the testing of HW Node B system. 4. Bachelor degree or ab...
shenshen1010 Recruitment
How to check build?
Through the cscript script inspection, it is found that Checked Build is False. Now I want to debug the driver. How can I make Checked Build True? 1) Is Checked Build an independent CD? 2) Or can I ju...
scx0704 Embedded System
How many mils can the line spacing of PCB manufacturers generally achieve?
I recently made a board, but the lines were too dense. I adjusted the spacing to 5 mil, but the PCB manufacturer said they couldn't do it. I was very depressed....
fengzhang2002 PCB Design
Keil C51 does not display header files!!!
If the picture is shown, the .h files included in the .c file should be displayed normally, but now it is not displayed, and the compilation is normal. Please give me some advice! !...
iirqc 51mcu
STM8 I2C communication issue
Dear experts, I am a beginner. I am using STM8S003F3 to debug hardware I2C. There are three devices on the bus, including STM8. When I reset the other two devices with MCU, I found that I2C was occupi...
h_peter stm32/stm8
Let’s analyze this AD timing together
SPI's CPOL=0, CPHA=1, falling edge data is written from the controller to the chip, and rising edge data is read from the chip to the controller. The falling edge of the first clock writes the MSB of ...
gaorz_ 51mcu

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 881  2631  1086  2329  2594  18  53  22  47  35 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号