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HCF40105

Description
FIFO REGISTER
File Size241KB,12 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
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HCF40105 Overview

FIFO REGISTER

HCC40105B
HCF40105B
FIFO REGISTER
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INDEPENDENT ASYNCHRONOUS INPUTS
AND OUTPUTS
3-STATE OUTPUTS
EXPANDABLE IN EITHER DIRECTION
STATUS INDICATORS ON INPUT AND OUT-
PUT
RESET CAPABILITY
STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED AT 20V
FOR HCC DEVICE
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N
o
13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
READY) indicates if the FIFO contains data. As the
earliest data are removed from the bottom of the data
stack (the output end), all data entered later will auto-
matically propagate (ripple) toward the output.
EY
(Plastic Package)
F
(Ceramic Package)
C1
(Chip Carrier)
ORDER CODES :
HCC40105BF
HCF40105BEY
HCF40105BC1
DESCRIPTION
The
HCC40105B
(extended temperature range) and
HCF40105B
(intermediate temperature range) are
monolithic integrated circuits, available in 16-lead dual
in-line plastic or ceramic package.
The
HCC/HCF40105B
is a low-power first-in-first-out
(FIFO) ”elastic” storage register that can store 16 4-bit
words. It is capable of handling input and output data
at different shifting rates. This feature makes it particu-
larly useful as a buffer between asynchronous sys-
tems. Each word position in the register is clocked by
a control flip-flop, which stores a marker bit. A ”1” sig-
nifies that the position’s data is filled and a ”0” denotes
a vacancy in that position. The control flip-flop detects
the state of the preceding flip-flop and communicates
its own status to the succeeding flip-flop. When a con-
trol flip-flop is in the ”0” state and sees a ”1” in the
preceding flip-flop, it generates a clock pulse that
transfers data from the preceding four data latches
into its own four data latches and resets the preceding
flip-flop to ”0”. The first and last control flip-flops have
buffered outputs. Since all empty locations ”bubble”
automatically to the input end, and all valid data ripple
through to the output end, the status of the first control
flip-flop (DATA-IN READY) indicates if the FIFO is full,
and the status of the last flip-flop (DATA-OUT
June 1989
PIN CONNECTIONS
1/12

HCF40105 Related Products

HCF40105 HCC40105BF HCF40105BC1 HCF40105BEY HCF40105B
Description FIFO REGISTER FIFO REGISTER FIFO REGISTER FIFO REGISTER FIFO REGISTER
Is it Rohs certified? - incompatible incompatible incompatible -
Maker - STMicroelectronics STMicroelectronics STMicroelectronics -
Parts packaging code - DIP QLCC DIP -
package instruction - DIP, DIP16,.3 PLASTIC, LCC-20 PLASTIC, DIP-16 -
Contacts - 16 20 16 -
Reach Compliance Code - _compli _compli _compli -
ECCN code - EAR99 EAR99 EAR99 -
Maximum access time - 370 ns 370 ns 370 ns -
Maximum clock frequency (fCLK) - 3 MHz 3 MHz 3 MHz -
period time - 333.33 ns 333.33 ns 125 ns -
JESD-30 code - R-GDIP-T16 S-PQCC-J20 R-PDIP-T16 -
JESD-609 code - e0 e0 e0 -
memory density - 64 bi 64 bi 64 bi -
Memory IC Type - OTHER FIFO OTHER FIFO OTHER FIFO -
memory width - 4 4 4 -
Number of functions - 1 1 1 -
Number of terminals - 16 20 16 -
word count - 16 words 16 words 16 words -
character code - 16 16 16 -
Operating mode - ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS -
Maximum operating temperature - 125 °C 85 °C 125 °C -
Minimum operating temperature - -55 °C -40 °C -55 °C -
organize - 16X4 16X4 16X4 -
Output characteristics - 3-STATE 3-STATE 3-STATE -
Exportable - YES YES YES -
Package body material - CERAMIC, GLASS-SEALED PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code - DIP QCCJ DIP -
Encapsulate equivalent code - DIP16,.3 LDCC20,.4SQ DIP16,.3 -
Package shape - RECTANGULAR SQUARE RECTANGULAR -
Package form - IN-LINE CHIP CARRIER IN-LINE -
Parallel/Serial - PARALLEL PARALLEL PARALLEL -
Peak Reflow Temperature (Celsius) - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
power supply - 3/18 V 3/15 V 3/15 V -
Certification status - Not Qualified Not Qualified Not Qualified -
Maximum seat height - 5.08 mm 4.57 mm 5.1 mm -
Maximum supply voltage (Vsup) - 18 V 15 V 20 V -
Minimum supply voltage (Vsup) - 3 V 3 V 3 V -
Nominal supply voltage (Vsup) - 5 V 5 V 5 V -
surface mount - NO YES NO -
technology - CMOS CMOS CMOS -
Temperature level - MILITARY INDUSTRIAL MILITARY -
Terminal surface - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form - THROUGH-HOLE J BEND THROUGH-HOLE -
Terminal pitch - 2.54 mm 1.27 mm 2.54 mm -
Terminal location - DUAL QUAD DUAL -
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
width - 7.62 mm 8.9662 mm 7.62 mm -

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