Datasheet
2.7V to 5.5V Input, 3A Integrated MOSFET
Single Synchronous Buck DC/DC Converter
For Automotive
BD9S300MUF-C
General Description
BD9S300MUF-C is a synchronous buck DC/DC
Converter with built-in low On Resistance power
MOSFETs. It is capable of providing current up to 3A.
The SLLM
TM
control provides excellent efficiency
characteristics in light-load conditions which make the
product ideal for reducing standby power consumption of
equipment. Small inductor is applicable due to high
switching frequency of 2.2MHz. It is a current mode
control DC/DC Converter and features high-speed
transient response. Phase compensation can also be set
easily.
It can also be synchronized to external pulse.
Key Specifications
Input Voltage:
2.7V to 5.5V
Output Voltage Setting:
0.8V to V
PVIN
x 0.8V
Output Current:
3A(Max)
Switching Frequency:
2.2MHz(Typ)
High Side MOSFET ON Resistance: 35mΩ (Typ)
Low Side MOSFET ON Resistance: 35mΩ (Typ)
Shutdown Circuit Current:
0μA (Typ)
Operating Temperature:
-40°C to +125°C
W(Typ) x D(Typ) x H(Max)
3.00mm x 3.00mm x 1.00mm
Package
VQFN16FV3030
Features
SLLM
TM
(Simple Light Load Mode) Control
AEC-Q100 Qualified
(Note 1)
Single Synchronous Buck DC/DC Converter
Adjustable Soft Start Function
Power Good Output
Input Under Voltage Lockout Protection
Short Circuit Protection
Output Over Voltage Protection
Over Current Protection
Thermal Shutdown Protection
Wettable Flank QFN Package
Enlarged View
VQFN16FV3030
Wettable Flank Package
(Note 1)
Grade 1
Applications
Automotive Equipment
(Cluster Panel, Infotainment Systems)
Other Electronic Equipment
Typical Application Circuit
V
IN
PVIN
V
MODE/SYNC
V
EN
AVIN
MODE/SYNC
EN
SS
ITH
PGD
BOOT
C
1
SW
V
OUT
L
1
C
OUT
R
1
C
IN1
C
IN2
R
3
C
3
C
2
PGND
AGND
FB
R
2
Figure 1. Application Circuit
SLLM
TM
is a trademark of ROHM Co., Ltd.
〇This
product has no designed protection against radioactive rays
〇Product
structure : Silicon monolithic integrated circuit
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BD9S300MUF-C
Pin Configuration
BOOT
13
AVIN
16
15
14
PVIN
PVIN
PGND
PGND
1
2
EXP-PAD
3
4
5
6
FB
PGD
EN
12 SW
11 SW
10 SW
9
7
ITH
SS
8
MODE
/SYNC
AGND
(TOP VIEW)
Figure 2. Pin Configuration
Pin Descriptions
Pin No.
1, 2
3, 4
5
6
7
Pin Name
PVIN
PGND
AGND
FB
ITH
Function
Power supply pins for the DC/DC Converter.
Connecting a 10µF ceramic capacitor is recommended.
Ground pins for the DC/DC Converter.
Ground pin.
V
OUT
voltage feedback pin. An inverting input node for the gm error amplifier. Connect output
voltage divider to this pin to set the output voltage. See
page 17
on how to compute for the
resistor values.
An output pin of the gm error amplifier and the input of PWM comparator.
Connect phase compensation components to this pin. See
page 20
on calculate the resistance
and capacitance of phase compensation.
Pin for selecting the SLLM
TM
control mode and the Forced PWM mode. Turning this pin signal
Low forces the device to operate in the Forced PWM mode. Turning this pin signal High enables
the SLLM
TM
control and the mode is automatically switched between the SLLM
TM
control and
PWM mode according to the load current. In addition, external synchronization operation is
started by inputting synchronous pulse signal to this pin.
Pin for setting the soft start time. The rise time of the output voltage can be specified by
connecting a capacitor to this pin. See
page 19
on calculate the capacitance.
Switch pin. These pins are connected to the source of the High Side MOSFET and drain of the
Low Side MOSFET. Connect a bootstrap capacitor of 0.1µF between these pins and the BOOT
pin.
Connect a bootstrap capacitor of 0.1µF between this pin and the SW pins.
The voltage of this capacitor is the gate drive voltage of the High Side MOSFET.
Power Good pin, an open drain output. Use of pull up resistor is needed. See
page 12
on setting
the resistance.
Pin for controlling the device. Turning this pin signal Low forces the device to enter the shutdown
mode. Turning this pin signal High enables the device.
Power supply input pin of the analog circuitry. Connect this pin to PVIN. Connecting a 0.1µF
ceramic capacitor is recommended.
A backside heat dissipation pad. Connecting to the internal PCB ground plane by using via
provides excellent heat dissipation characteristics.
8
MODE
/SYNC
9
10, 11, 12
13
14
SS
SW
BOOT
PGD
15
16
-
EN
AVIN
EXP-PAD
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Block Diagram
V
IN
AVIN
16
Slope
V
IN
PVIN
1
2
EN
15
VREF
Error
Amplifier
PWM
Comparator
BOOT
FB
R
6
REF_OCP
Q
Driver
Logic
13
S
SW
SS
9
Soft
Start
OSC
AVIN
PVIN
10
11
V
OUT
UVLO
12
ITH
7
Power
Good
SCP
3
OVP
4
TSD
AGND
5
14
PGD
MODE/
SYNC
PGND
8
Figure 3. Block Diagram
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Description of Blocks
1. VREF
The VREF block generates the internal reference voltage.
2. UVLO (Under Voltage Lockout)
The UVLO block is for under voltage lockout protection. It will shutdown the device when the V
IN
falls to 2.45V(Typ) or
lower. The threshold voltage has a hysteresis of 100mV(Typ).
3. SCP (Short Circuit Protection)
This is the short circuit protection circuit. After soft start is judged to be completed, if the FB pin voltage falls to 0.56V(Typ)
or less and remain in that state for 1ms(Typ), output MOSFET will turn OFF for 14ms(Typ) and then restart the operation.
4. OVP (Over Voltage Protection)
This is the output over voltage protection circuit. When the FB pin voltage becomes 0.880V(Typ) or more, it turns the
output MOSFET OFF. After output voltage falls 0.856V(Typ) or less, the output MOSFET returns to normal operation.
5. TSD (Thermal Shutdown)
This is the thermal shutdown circuit. It will shutdown the device when the junction temperature (Tj) reaches to 175°C(Typ)
or more. When the Tj falls below the TSD threshold, the circuits are automatically restored to normal operation with
hysteresis of 25°C(Typ).
6. OCP (Over Current Protection)
The Over Current Protection function operates by limiting the current that flows through High Side MOSFET at each cycle
of the switching frequency.
7. Soft Start
The Soft Start circuit slows down the rise of output voltage during startup, which allows the prevention of output voltage
overshoot. The soft start time of the output voltage can be specified by connecting a capacitor to the SS pin. See
page 19
on calculate the capacitance. A built-in soft start function is provided and a soft start is initiated in 1ms(Typ) when the SS
pin is open.
8. Error Amplifier
The Error Amplifier block is an error amplifier and its inputs are the reference voltage 0.8V(Typ) and the FB pin voltage.
Phase compensation can be set by connecting a resistor and a capacitor to the ITH pin. See
page 20
on calculate the
resistance and capacitance of phase compensation.
9. PWM Comparator
The PWM Comparator block compares the output voltage of the Error Amplifier and the Slope signal to determine the
switching duty.
10. OSC (Oscillator)
This block generates the oscillating frequency.
11. Driver Logic
This block controls switching operation and various protection functions.
12. Power Good
When the FB pin voltage reaches 0.8V(Typ) within ±7%, the built-in Nch MOSFET turns OFF and the PGD output turns
high. In addition, the PGD output turns low when the FB pin voltage reaches outside ±10% of 0.8V(Typ).
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Absolute Maximum Ratings (Ta=25°C)
Parameter
Input Voltage
EN Voltage
MODE / SYNC Voltage
PGD Voltage
BOOT Voltage
Voltage from SW to BOOT
FB ITH SS Voltage
Maximum Junction Temperature
Storage Temperature Range
Symbol
V
PVIN,
V
AVIN
V
EN
V
MODE/SYNC
V
PGD
V
BOOT
ΔV
BOOT
V
FB,
V
ITH,
V
SS
Tjmax
Tstg
Rating
-0.3 to +7
-0.3 to V
AVIN
-0.3 to V
AVIN
-0.3 to +7
-0.3 to +14
-0.3 to +7
-0.3 to V
AVIN
150
-55 to +150
Unit
V
V
V
V
V
V
V
°C
°C
Caution 1:
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2:
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance
(Note 1)
Parameter
VQFN16FV3030
Junction to Ambient
Junction to Top Characterization Parameter
(Note 2)
θ
JA
Ψ
JT
189.0
23
57.5
10
°C/W
°C/W
Symbol
Thermal Resistance (Typ)
1s
(Note 3)
2s2p
(Note
4)
Unit
(Note 1)
Based on JESD51-2A(Still-Air)
(Note 2)
The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3)
Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Single
Top
Copper Pattern
Footprints and Traces
Layer Number of
Measurement Board
4 Layers
Top
Copper Pattern
Footprints and Traces
Material
FR-4
Thickness
70μm
Board Size
114.3mm x 76.2mm x 1.57mmt
(Note 4)
Using a PCB board based on JESD51-5, 7.
Material
FR-4
Thickness
70μm
Board Size
114.3mm x 76.2mm x 1.6mmt
2 Internal Layers
Copper Pattern
74.2mm x 74.2mm
Thickness
35μm
Thermal Via
(Note
5)
Pitch
1.20mm
Bottom
Copper Pattern
74.2mm x 74.2mm
Thickness
70μm
Diameter
Φ0.30mm
(Note 5)
This thermal via connects with the copper pattern of all layers.
Recommended Operating Conditions
Parameter
Input Voltage
Operating Temperature
Output Current
Output Voltage Setting
SW Minimum ON Time
External Clock Frequency
Synchronous Operation Input Duty
Symbol
V
PVIN,
V
AVIN
Topr
I
OUT
V
OUT
t
ON_MIN
f
SYNC
D
SYNC
Min
2.7
-40
-
0.8
(Note 1)
-
1.8
25
Max
5.5
+125
3
V
PVIN
x 0.8
95
2.4
75
Unit
V
°C
A
V
ns
MHz
%
(Note 1)
Although the output voltage is configurable at 0.8V and higher, it may be limited by the SW min ON pulse width. For the configurable range,
please refer to the Output Voltage Setting in
Selection of Components Externally Connected.
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