UNISONIC TECHNOLOGIES CO., LTD
UB280
Preliminary
CMOS IC
1-CELL LITHIUM-ION/POLYMER
BATTERY PROTECTION IC
DESCRIPTION
The UTC
UB280
is a series of lithium-ion/lithium-polymer
rechargeable battery protection ICs incorporating high accuracy
voltage detection circuits and delay circuits.
The UTC
UB280
is suitable for protection of single cell lithium-ion /
lithium polymer battery packs from overcharge, over discharge and
over current.
The ultra-small package and less required external components
make it ideal to integrate the UTC
UB280
into the limited space of
battery pack.
FEATURES
* Wide Supply Voltage Range: V
DD
=1.5V~10V
* Ultra-Low Quiescent Current: I
OPE
=3.0μA (V
DD
=3.9V)
* Ultra-Low Power-Down Current: I
PDN
=0.2μA (V
DD
=2.0V)
* Overcharge Detection Voltage: V
DET1
=4.05V~4.35V
* Overcharge Release Voltage: V
REL1
=3.8V~4.25V
* Over Discharge Detection Voltage: V
DET2
=2.2V~3.1V
* Over Discharge Release Voltage: V
REL2
=2.3V~3.3V
* Discharge Over Current Detection Voltage: V
DET3
=0.07V~0.23V
* Discharge Short Circuit Detection Voltage: V
SHORT
=0.9V
* Over Voltage Charger Detection Voltage: V
CHG1
=11V
* Charger Detection Voltage: V
CHA
=-0.7V
* Delay Times are Generated by an Internal Circuit. (External Capacitors are Unnecessary.)
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
UB280L-xx-AG6-R
UB280G-xx-AG6-R
Note: xx: Output Voltage, refer to Marking Information.
Package
SOT-26
Packing
Tape Reel
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QW-R128-003.a
UB280
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
(V
SS
=0V, T
A
=25°С unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Input Voltage Between V
DD
and V
SS
(Note 1)
V
DD
V
SS
-0.3 ~ V
SS
+12
V
CO Output Pin Voltage
V
CO
V
DD
-28 ~ V
DD
+0.3
V
DO Output Pin Voltage
V
DO
V
SS
-0.3 ~ V
DD
+0.3
V
V
M
Input Pin Voltage
V
M
V
DD
-28 ~ V
DD
+0.3
V
DS Input Pin Voltage
V
DS
V
SS
-0.3 ~ V
DD
+0.3
V
Ambient Operating Temperature
T
OPR
-40 ~ +85
°С
Storage Temperature
T
STG
-55 ~ +125
°С
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Pulse (μsec) noise exceeding the above input voltage (V
SS
+12V) may cause damage to the IC.
ELECTRICAL CHARACTERISTICS
(V
SS
=0V, T
A
=25°С unless otherwise specified)
PARAMETER
CURRENT CONSUMPTION
Supply Current
Power-Down Current
DETECTION VOLTAGE
Overcharge Detection Voltage
Overcharge Release Voltage
Overdischarge Detection Voltage
Overdischarge Release Voltage
Discharge Over Current Detection Voltage
Discharge Short Circuit Detection Voltage
SYMBOL
I
OPE
I
PDN
TEST CONDITIONS
V
DD
=3.9V, V
M
=0V
V
DD
=V
M
=2.0V
MIN
TYP
3.0
0.2
MAX
8.0
0.5
V
DET1
+0.05
V
REL1
+0.05
V
DET2
+0.10
V
REL2
+0.10
V
DET3
+0.03
0.12
UNIT
μA
μA
V
V
V
V
V
V
V
V
V
V
V
s
ms
ms
ms
ms
ms
µs
V
V
DET1
V
REL1
V
DET2
V
REL2
V
DET3
V
DD
=3.0V
V
SHORT
V
DD
=3.0V
V
DET1
-0.05
V
REL1
-0.05
V
DET2
-0.10
V
REL2
-0.10
V
DET3
-0.03
0.60
V
DET1
V
REL1
V
DET2
V
REL2
V
DET3
0.90
1.0
0V BATTERY CHARGE VOLTAGE
0V Battery Charge Starting Charger
V
0CHA
Voltage
CONTROL OUTPUT VOLTAGE(CO&DO)
CO Pin Output “H” Voltage
V
COH
CO Pin Output “L” Voltage
V
COL
DO Pin Output “H” Voltage
V
DOH
DO Pin Output “L” Voltage
V
DOL
DELAY TIME
Overcharge Detection Delay Time
t
DET1
Overcharge Release Delay Time
t
REL1
Overdischarge Detection Delay Time
t
DET2
Overdischarge Release Delay Time
t
REL2
Discharge Over Current Detection Delay
Time
Discharge Over Current Release Delay Time
Discharge Short Circuit Detection Delay
Time
V
DD
=3.9V, I
CO
=-30µA
V
DD
=4.5V, I
CO
=30µA
V
DD
=3.9V, I
DO
=-30µA
V
DD
=2.0V, I
DO
=30µA
V
DD
=3.6V to 4.6V
V
DD
=4.6V to 3.6V
V
DD
=3.6V to 2.0V
V
DD
=2.0V to 3.6V
V
DD
=3.6V, V
M
=0V to 0.3V
V
DD
=3.6V, V
M
=0.3V to 0V
3.4
3.4
3.7
0.4
3.7
0.2
0.5
6
100
3
10
3
500
11
0.5
0.5
t
DET3
t
REL3
t
SHORT
V
DD
=3.6V, V
M
=0V to 3.0V
V
CHG1
V
DD
=3.6V
Over Voltage Charger Detection
Voltage
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QW-R128-003.a
UB280
OPERATION
Preliminary
CMOS IC
1. Over charge detector
In the state of charging the battery, it will detect the overcharge state of the battery if the V
DD
terminal voltage
becomes higher than the overcharge detection voltage (V
DET1
). And then the CO terminal turns to low level, so the
external charging control Nch MOSFET turns OFF and it forbids to charge the battery.
After detecting overcharge, it will release the overcharge state if the V
DD
terminal voltage becomes lower than the
overcharge release voltage (V
REL1
). And then the CO terminal turns to high level, so the external charging control
Nch MOS FET turns ON, and it accepts to charge the battery.
When the V
DD
terminal voltage is higher than the overcharge detection voltage, to disconnect the charger and
connect the load, leave the CO terminal low level, but it accepts to conduct load current via the paracitical body
diode of the external Nch MOSFET. And then if the V
DD
terminal voltage becomes lower than the overcharge
detection voltage, the CO terminal turns to high level, so the external Nch MOSFET turn ON, and it accepts to
charge the battery.
The overcharge detection and release have delay time decided internally. When the V
DD
terminal voltage becomes
higher than the overcharge detection voltage, it will not detect overcharge, if the V
DD
terminal voltage becomes lower
than the overcharge detection voltage again within the overcharge detection delay time. And in the state of
overcharge, when the V
DD
terminal voltage becomes lower than the overcharge release voltage, it will not release
overcharge, if the V
DD
terminal voltage backs higher than the overcharge release voltage again within the overcharge
release delay time.
The output driver stage of the CO terminal includes a level shifter, so it will output the V
M
terminal voltage as low
level. The output type of the CO terminal is CMOS output between V
DD
and V
M
terminal voltage.
2. Over discharge detector
In the state of discharging the battery, it will detect the overdischarge state of the battery If the V
DD
terminal
becomes lower than the overdischarge detection voltage (V
DET2
). And then the DO terminal turns to low level, so the
external discharging control Nch MOSFET turn OFF and it forbids to discharge the battery.
Once overdischarge has been detected, overdischarge is released and the DO output becomes high level, if the
voltage of the battery rises more than the overdischarge detection voltage with connecting the charger, or more than
the overdischarge release voltage without connecting the charger. Charging current is supplied through a parasitic
diode of Nch MOSFET when the V
DD
terminal voltage is below the overdischarge detection voltage to the connection
of the charger, and the DO terminal enters the state which can be discharged by becoming high level, and turning on
Nch MOSFET when the V
DD
terminal voltage rises more than the overdischarge detection voltage.
When the battery voltage is about 0V, the CO terminal outputs high level and it accepts to conduct charging
current, if the charger voltage is higher than the minimum operating voltage for 0V charging.
The overdischarge detection have delay time decided internally. When the V
DD
terminal voltage becomes lower
than the overdischarge detection voltage, it will not detect overdischarge, if the V
DD
terminal voltage becomes higher
than the overdischarge detection voltage again within the overdischarge detection delay time. Moreover, the
overdischarge release delay time exists, too.
All the circuits are stopped, and after the overdischarge is detected, it is assumed the state of the standby, and
decreases the current (standby current) which IC consumes as much as possible (When V
DD
=2V, Max.0.5uA).
The output type of the DO terminal is CMOS output between V
DD
and V
SS
terminal voltage.
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QW-R128-003.a