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BSP75A

Description
Smart Lowside Power Switch (Logic Level Input Input protection ESD Thermal shutdown with restart)
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size62KB,9 Pages
ManufacturerSIEMENS
Websitehttp://www.infineon.com/
Download Datasheet Parametric View All

BSP75A Overview

Smart Lowside Power Switch (Logic Level Input Input protection ESD Thermal shutdown with restart)

BSP75A Parametric

Parameter NameAttribute value
MakerSIEMENS
Parts packaging codeSOT-223
package instruction,
Contacts4
Reach Compliance Codeunknow
ECCN codeEAR99
Built-in protectionTRANSIENT; OVER CURRENT; OVER VOLTAGE; THERMAL
Interface integrated circuit typeBUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 codeR-PDSO-G4
Number of functions1
Number of terminals4
Maximum operating temperature150 °C
Minimum operating temperature-40 °C
Output current flow directionSINK
Nominal output peak current1.5 A
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Certification statusNot Qualified
surface mountYES
Temperature levelAUTOMOTIVE
Terminal formGULL WING
Terminal locationDUAL
Disconnect time20 µs
connection time20 µs
Preliminary data sheet
HITFET® BSP 75A
Smart Lowside Power Switch
Features
Logic Level Input
Input protection (ESD)
Thermal shutdown (with restart)
Overload protection
Short circuit protection
Overvoltage protection
Current limitation
Product Summary
Continuous drain source voltage
On-state resistance
Current limitation
Load current (ISO)
Clamping energy
V
DS
R
DS(ON)
I
D(lim)
I
D(ISO)
E
AS
55
550
1
0.7
550
V
mΩ
A
A
mJ
Application
All kinds of resistive, inductive and capacitive loads in switching applications
• µC
compatible power switch for 12 V and 24 V DC applications
Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET in
Smart Power Technology.
Fully protected by embedded protection functions.
V bb
+
LOAD
M
Drain
2
Overvoltage
protection
dv/dt
IN
limitation
Short circuit
protection
Short circuit
Current
protection
limitation
Source
1
ESD
Over-
temperature
protection
3
HITFET
®
4
Pin
1
2
3
TAB
Symbol
IN
DRAIN
SOURCE
SUBSTRATE
Function
Input
Output to the load
Ground
Internally connected to source (pin 3)
Semiconductor Group
Page 1 of 9
1998-02-04

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