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IR3831WM

Description
HIGHLY EFFICIENT INTEGRATED SYNCHRONOUS BUCK REGULATOR FOR DDR APPLICATIONS
File Size740KB,33 Pages
ManufacturerInternational Rectifier ( Infineon )
Websitehttp://www.irf.com/
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IR3831WM Overview

HIGHLY EFFICIENT INTEGRATED SYNCHRONOUS BUCK REGULATOR FOR DDR APPLICATIONS

PD-97660
IR3831WMPbF
SupIRBuck
Features
TM
HIGHLY EFFICIENT INTEGRATED
Description
The IR3831W
SupIRBuck
TM
is an easy-to-use,
fully integrated and highly efficient DC/DC
regulator. The MOSFETS co-packaged with the
on-chip PWM controller make IR3831W a space-
efficient solution, providing accurate power
delivery for DDR memory applications.
IR3831W is configured to generate termination
voltage (VTT) for DDR memory applications.
IR3831W offers programmability of start up time,
switching frequency and current limit while
operating in wide input and output voltage range.
The switching frequency is programmable from
250kHz to 1.5MHz for an optimum solution.
It also features important protection functions,
such as Pre-Bias startup, hiccup current limit and
thermal shutdown to give required system level
security in the event of fault conditions.
Distributed Point of Load Power Architectures
Netcom Applications
SYNCHRONOUS BUCK REGULATOR FOR DDR APPLICATIONS
Wide Input Voltage Range 1.0V to 16V
Wide Output Voltage Range 0.6V to 0.9*Vin
Continuous 8A Load Capability
Integrated Bootstrap-diode
High Bandwidth E/A for excellent transient
performance
Programmable Switching Frequency up to 1.5 MHz
Programmable Over Current Protection
PGood output
Hiccup Current Limit
Programmable Soft-Start
Enable Input with Voltage Monitoring Capability
Enhanced Pre-Bias Start-up
Vp input for DDR Tracking applications
-40
o
C to 125
o
C operating junction temperature
Thermal Protection
5mm x 6mm Power QFN Package, 0.9 mm height
Lead-free, halogen-free and RoHS compliant
Applications
Server Applications
Storage Applications
Embedded Telecom Systems
1.0V <Vin<16V
4.5V <Vcc<5.5V
Enable
VDDQ
PGood
PGood
Vp
Rt
Vcc
Vin
Boot
Vo
SW
OCSet
Fb
SS/ SD
Gnd
PGnd
Comp
Fig. 1. Typical application diagram
Rev 16.0
1

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Description HIGHLY EFFICIENT INTEGRATED SYNCHRONOUS BUCK REGULATOR FOR DDR APPLICATIONS HIGHLY EFFICIENT INTEGRATED SYNCHRONOUS BUCK REGULATOR FOR DDR APPLICATIONS

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