ZXFBF05
4 Channel Buffer Device with high capacitance
load capability
DEVICE DESCRIPTION
The ZXFBF05 is a low cost, high slew rate, quad buffer
amplifier. Built using the Zetex CA700 technology, this
buffer has a small signal bandwidth of greater than
100MHz and a 1 volt pk-pk bandwidth of greater than
20 MHz. Each channel draws only 7.5mA. The device
operates from a ±5 volt supply, which makes it ideal in
a majority of applications.
This space saving buffer may be used in a wide variety
of applications such as, video switching matrix,
multi-channel instrumentation equipment, and A/D
input buffer, etc.
FEATURES AND BENEFITS
•
•
•
•
•
•
•
•
4 Buffers per package
Low distortion Class A O/P
100MHz bandwidth
Low cost
Designed for up to 300pF load
Low supply current (7.5mA per buffer)
No thermal runaway
14 pin SOIC package
APPLICATIONS
•
•
•
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Video Switching Matrix input buffer
Instrumentation
Multi-channel A/D input buffer
Multi-isolation buffer
PART
NUMBER
ZXFBF05N14
PACKAGE
SOIC14N
PART MARK
ZXFBF05
ORDERING INFORMATION
PART NUMBER
ZXFBF05N14TA
ZXFBF05N14TC
CONTAINER
Reel 7”
Reel 13”
INCREMENT
500
2500
RELATED PRODUCTS
ZXFBF04 4 Channel Buffer
ZXFBF08 8 Channel Buffer
ZXFBF25 4 Channel Buffer with output enable
CONNECTION DIAGRAM
OUT1
NC
IN1
V+
IN2
NC
OUT2
OUT4
NC
IN4
V-
IN3
NC
OUT3
14 PIN SOIC PACKAGE
ISSUE 1 - FEBRUARY 2001
1
ZXFBF05
ABSOLUTE MAXIMUM RATINGS
Voltage on any pin
Operating temperature range
Storage Temperature
20V (relative to V-)
0 to 70°C (de-rated for -40 to 85°C)
-55 to 125°C
ELECTRICAL CHARACTERISTICS
Test Conditions: Temperature =25°C, V+ = 5.00, V- = -5.00V, R
L
= 1kΩ, C
L
= 10pF
Parameter
Offset Voltage
Offset Voltage Drift
Supply Current
Input Bias Current
Output Voltage
DC Gain
DC Gain
Sink Current
Source Current
Input Resistance
Output Resistance
Bandwidth
Slew Rate
Voltage Noise
Differential Gain
NTSC
Differential Phase
NTSC
Differential Gain
PAL
Differential Phase
PAL
Channel Isolation
10 – 100 kHz
F = 3.58MHz, V
in
= 0.286Vp-p,
DC
∆V
in
= 0 to 0.714V
20mVp-p,
1.0Vp-p
Conditions
V
in
= 0V
V
in
= 0V
All inputs = 0V
V
in
= 0V
R
L
= 200Ω
V
in
= ± 0.5V, R
L
= 1kΩ
V
offset
= 0.0V
V
in
= ±0.5V, R
L
= 1kΩ
V
offset
= 0.25V
V
in
= 0V, V
out
=0.5V
V
in
= 0V, V
out
=-0.5V
0.95
0.95
4.0
8.0
10
5
5.0
0.1
Min.
-25
Typical
-
20
30
1.0
±1
0.98
0.98
6.0
15.0
20
10
100
20
40
15
0.1
0.15
0.1
F = 4.43MHz, V
in
= 0.286Vp-p,
DC
∆V
in
= 0 to 0.714V
V
in
= 370mVp-p, RL = 1kΩ
F = 4 MHz
0.15
-60
1.00
1.00
12.0
18.0
100
15
40
2.0
Max.
25
Units
mV
V/°C
mA
µA
V
V/V
V/V
mA
mA
MΩ
Ω
MHz
V/µs
nV/√
Hz
%
Degrees
%
Degrees
dB
NOTES
Test circuit for measuring channel isolation.
Channel Isolation = 20 x LOG
10
(V
out
/ V
in
) dB
Vin=370mV pk-pk,
F = 4 MHz
V
out
RL = 1kΩ
ISSUE 1 - FEBRUARY 2001
2
ZXFBF05
PIN DESCRIPTION
OUT1
NC
IN1
V+
IN2
NC
OUT2
OUT4
NC
IN4
V-
IN3
NC
OUT3
OUT 1,2,3,4
IN 1,2,3,4
V+
V-
Buffer outputs.
Buffer Inputs.
Positive supply pin, +5 volts.
Negative supply pin, -5 volts.
14 PIN SOIC PACKAGE
APPLICATION CIRCUIT
DC Coupled Configuration
ISSUE 1 - FEBRUARY 2001
3
ZXFBF05
APPLICATION CIRCUIT
AC Coupled Configuration
V+
100nF
_
C
V
in
R
S
100nF
V
out
+
1/4 ZXFBF04
R
L
V-
NOTE.
Rs: Source Resistor, provides DC bias for buffer input. Rs 10kΩ
Both 100nF decoupling capacitors should be situated close to device supply pins.
TYPICAL CHARACTERISTICS
0.991
-40
V+ = 5V
R
L
= 1k
Ω
DC Gain (V
in
/V
out
)
Attenation (dB)
-25
0
25
50
75
100
0.990
0.989
0.988
0.987
0.986
-50
-50
-60
-70
-80
-90
-100
0.1
1
10
Temperature (°C)
Frequency (MHz)
DC Differential Gain v Temperature
Channel Isolation v Frequency
ISSUE 1 - FEBRUARY 2001
4
PCB Design
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