74LVC1G97GF datasheet, PDF - EEWORLD Datasheet

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74LVC1G97GF: DescriptionLow-power configurable multiple function gate; Categorylogic logic; File Size157KB，21 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVC1G97GF Overview

Low-power configurable multiple function gate

74LVC1G97GF Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SON
package instruction	1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, XSON-6
Contacts	6
Reach Compliance Code	unknow
series	LVC/LCX/Z
JESD-30 code	S-PDSO-N6
JESD-609 code	e3
length	1 mm
Logic integrated circuit type	LOGIC CIRCUIT
Humidity sensitivity level	1
Number of functions	1
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Package shape	SQUARE
Package form	SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	TIN
Terminal form	NO LEAD
Terminal pitch	0.35 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	1 mm

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74LVC1G97

Low-power configurable multiple function gate

Rev. 3 — 7 December 2011

Product data sheet

1. General description

The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The

device can be configured as any of the following logic functions MUX, AND, OR, NAND,

NOR, inverter and buffer; using the 3-bit input. All inputs can be connected to V

GND.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in mixed 3.3 V and 5 V environments.

This device is fully specified for partial power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

2. Features and benefits



Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant input/output for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:



JESD8-7 (1.65 V to 1.95 V)



JESD8-5 (2.3 V to 2.7 V)



JESD8B/JESD36 (2.7 V to 3.6 V).

24

mA output drive (V

= 3.0 V)

ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V



CDM JESD22-C101E exceeds 1000 V

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

Multiple package options

Specified from

40 C

to +85

C

and

40 C

to +125

C.



74LVC1G97GF Related Products

	74LVC1G97GF	74LVC1G97GM	74LVC1G97GN	74LVC1G97GS	74LVC1G97GV	74LVC1G97GW
Description	Low-power configurable multiple function gate	Low-power configurable multiple function gate	Low-power configurable multiple function gate	Low-power configurable multiple function gate	Low-power configurable multiple function gate	Low-power configurable multiple function gate
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
Maker	NXP	NXP	NXP	NXP	NXP	NXP
Parts packaging code	SON	SON	SON	SON	TSOP	SOT-363
package instruction	1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, XSON-6	1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, XSON-6	0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, XSON-6	1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, XSON-6	PLASTIC, SOT-457, SC-74, TSOP-6	PLASTIC, SOT-363, SC-88, 6 PIN
Contacts	6	6	6	6	6	6
Reach Compliance Code	unknow	unknow	unknow	unknow	unknow	unknow
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	S-PDSO-N6	R-PDSO-N6	R-PDSO-N6	S-PDSO-N6	R-PDSO-G6	R-PDSO-G6
JESD-609 code	e3	e3	e3	e3	e3	e3
length	1 mm	1.45 mm	1 mm	1 mm	2.9 mm	2 mm
Logic integrated circuit type	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT
Humidity sensitivity level	1	1	1	1	1	1
Number of functions	1	1	1	1	1	1
Number of terminals	6	6	6	6	6	6
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VSON	VSON	SON	VSON	TSSOP	TSSOP
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	0.5 mm	0.5 mm	0.35 mm	0.35 mm	1.1 mm	1.1 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1.65 V	1.65 V	1.65 V	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	TIN	TIN	TIN	TIN	TIN	PURE TIN
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	GULL WING	GULL WING
Terminal pitch	0.35 mm	0.5 mm	0.3 mm	0.35 mm	0.95 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30
width	1 mm	1 mm	0.9 mm	1 mm	1.5 mm	1.25 mm

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