1893CK datasheet, PDF - EEWORLD Datasheet

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1893CK: DescriptionInterface Circuit, 1-Trnsvr, CMOS, PQCC56, 8 X 8 MM, PLASTIC, M0-220VLLD-5, MLF2-56; CategoryWireless rf/communication Telecom circuit; File Size780KB，127 Pages; ManufacturerIDT (Integrated Device Technology)

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1893CK Overview

Interface Circuit, 1-Trnsvr, CMOS, PQCC56, 8 X 8 MM, PLASTIC, M0-220VLLD-5, MLF2-56

1893CK Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	DFN
package instruction	HVQCCN, LCC56,.31SQ,20
Contacts	56
Manufacturer packaging code	MLF
Reach Compliance Code	_compli
ECCN code	EAR99
data rate	100000 Mbps
JESD-30 code	S-PQCC-N56
JESD-609 code	e0
length	8 mm
Humidity sensitivity level	3
Number of functions	1
Number of terminals	56
Transceiver quantity	1
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC56,.31SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum slew rate	0.16 mA
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	INTERFACE CIRCUIT
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	8 mm
Base Number Matches	1

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Integrated Device Technology, Inc.

ICS1893CF

General

The ICS1893CF is a low-power, physical-layer device (PHY)

that supports the ISO/IEC 10Base-T and 100Base-TX

Carrier-Sense Multiple Access/Collision Detection

(CSMA/CD) Ethernet standards, ISO/IEC 8802-3.

The ICS1893CF is intended for MII, Node applications that

require the Auto-MDIX feature that automatically corrects

crossover errors in plant wiring.

The ICS1893CF incorporates Digital-Signal Processing (DSP)

control in its Physical-Medium Dependent (PMD) sub layer. As

a result, it can transmit and receive data on unshielded

twisted-pair (UTP) category 5 cables with attenuation in

excess of 24 dB at 100MHz. With this ICS-patented

technology, the ICS1893CF can virtually eliminate errors from

killer packets.

The ICS1893CF provides a Serial-Management Interface for

exchanging command and status information with a

Sta t i o n - M a n a g e m e n t ( S TA) e n t i t y. T h e I CS 1 8 9 3 C F

Media-Dependent Interface (MDI) can be configured to

provide either half- or full-duplex operation at data rates of 10

Mb/s or 100Mb/s.

The ICS1893CF is available in a 300-mil 48-lead SSOP

pa c k ag e. T he I CS 18 9 3C F s h ar es t he s a m e p r o v en

performance circuitry with the ICS1893BF and is a pin-for-pin

replacement of the 1893BF.

Document Type:

Document Stage:

Data Sheet

Rev. K Release

3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

Features

•

Supports category 5 cables with attenuation in excess of

24dB at 100 MHz.

•

Single-chip, fully integrated PHY provides PCS, PMA, PMD,

and AUTONEG sub layers functions of IEEE standard.

10Base-T and 100Base-TX IEEE 8802.3 compliant

Single 3.3V power supply

Highly configurable, supports:

– Media Independent Interface (MII)

– Auto-Negotiation with Parallel detection

– Node applications, managed or unmanaged

– 10M or 100M full and half-duplex modes

– Loopback mode for Diagnostic Functions

– Auto-MDI/MDIX crossover correction

Low-power CMOS (typically 400 mW)

Power-Down mode typically 21mW

Clock and crystal supported

Fully integrated, DSP-based PMD includes:

– Adaptive equalization and baseline-wander correction

– Transmit wave shaping and stream cipher scrambler

– MLT-3 encoder and NRZ/NRZI encoder

Small footprint 48-pin 300 mil. SSOP package

Also available in small footprint 56-pin 8x8 MLF2 package

Available in Industrial Temp

•

Applications:

NIC cards, PC motherboards, switches,

routers, DSL and cable modems, game machines, printers,

network connected appliances, and industrial equipment.

•

ICS1893CF Block Diagram

100Base-T

10/100 MII

MAC

Interface

MUX

PCS

• Framer

• CRS/COL

Detection

• Parallel to Serial

• 4B/5B

PMA

• Clock Recovery

• Link Monitor

• Signal Detection

• Error Detection

TP_PMD

• MLT-3

• Stream Cipher

• Adaptive Equalizer

• Baseline Wander

Correction

Integrated

Switch

10Base-T

MII

Extended

Set

Low-Jitter

Clock

Synthesizer

Clock

Power

Twisted-

Pair

Interface to

Magnetics

Modules and

RJ45

Connector

MII

Management

Interface

Configuration

and Status

Auto-

Negotiation

LEDs and PHY

Address

ICS1893CF, Rev. K, 05/13/10

IDT reserves the right to make changes in the device data identified in

this publication without further notice. IDT advises its customers to

obtain the latest version of all device data to verify that any information

being relied upon by the customer is current and accurate.

May, 2010

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