Enpirion
®
Power Datasheet
EP53A8LQI/EP53A8HQI 1A PowerSoC
Synchronous Buck Regulator
with Integrated Inductor
Description
The EP53A8LQI and EP53A8HQI are a 1000mA
PowerSoC. The device integrates MOSFET
switches, control, compensation, and the
Inductor in an advanced 3mm x 3mm QFN
Package.
Integrated inductor ensures the complete power
solution is fully characterized with the inductor
carefully
matched
to
the
silicon
and
compensation network. It enables a tiny solution
footprint, low output ripple, low part-count, and
high reliability, while maintaining high efficiency.
The complete solution can be implemented in as
little as 21mm
2
.
The EP53A8xQI uses a 3-pin VID to easily select
the output voltage setting.
Output voltage
settings are available in 2 optimized ranges
providing coverage for typical V
OUT
settings.
The VID pins can be changed on the fly for fast
dynamic voltage scaling. EP53A8LQI further has
the option to use an external voltage divider.
Features
•
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•
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•
•
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•
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•
•
3.5mm
4.7uF
100 Ohm
Integrated Inductor Technology
3mm x 3mm x 1.1mm QFN package
Total Solution Footprint ~ 21mm
2
Low V
OUT
ripple for IO compatibility
High efficiency, up to 94%
1000mA continuous output current
Less than 1µA standby current
5 MHz switching frequency
3 pin VID for glitch free voltage scaling
V
OUT
Range 0.6V to V
IN
– 0.5V
Short circuit and over current protection
UVLO and thermal protection
IC level reliability in a PowerSoC solution
Applications
Portable wireless and RF applications
Wireless broad band data cards
Solid state storage applications
Noise and space sensitive applications
100 ohm
PVIN
V
OUT
V
SENSE
V
FB
PGND AGND
V
OUT
V
IN
4.7µF
0603
AVIN
ENABLE
6mm
EP53A8xQI
V
S0
V
S1
V
S2
10µF
0805
10uF
Figure 1.
Total Solution Footprint
Figure 2.
Typical Application Circuit.
www.altera.com/enpirion
03651
September 17, 2013
Rev D
EP53A8LQI/EP53A8HQI
Ordering Information
Part Number
EP53A8LQI
EP53A8HQI
EVB-EP53A8LQI
EVB-EP53A8HQI
Comment
LOW VID Range
HIGH VID Range
Package
16-pin QFN T&R
16-pin QFN T&R
EP53A8LQI Evaluation Board
EP53A8HQI Evaluation Board
Packing and Marking Information:
www.altera.com/support/reliability/packing/rel-packing-and-marking.html
Pin Assignments (Top View)
Figure 1:
EP53A8LQI Pin Out Diagram (Top View)
Figure 4:
EP53A8HQI Pin Out Diagram (Top View) Pin
Description
Pin Description
PIN
1, 15,
16
2,3
4
5
6
7, 8
9, 10,
11
12
13
14
NAME
NC(SW)
PGND
VFB
VSENSE
AGND
VOUT
VS2, VS1,
VS0
ENABLE
AVIN
PVIN
FUNCTION
NO CONNECT – These pins are internally connected to the common switching node of the
internal MOSFETs. NC (SW) pins are not to be electrically connected to any external signal,
ground, or voltage. However, they must be soldered to the PCB. Failure to follow this guideline
may result in part malfunction or damage to the device.
Power ground. Connect this pin to the ground electrode of the Input and output filter
capacitors.
EP53A8LQI: Feed back pin for external divider option.
EP53A8HQI: No Connect
Sense pin for preset output voltages. Refer to application section for proper configuration.
Analog ground. This is the quiet ground for the internal control circuitry, and the ground return
for external feedback voltage divider
Regulated Output Voltage. Refer to application section for proper layout and decoupling.
Output voltage select. VS2 = pin 9, VS1 = pin 10, VS0 = pin 11.
EP53A8LQI: Selects one of seven preset output voltages or an external resistor divider.
EP53A8HQI: Selects one of eight preset output voltages.
(Refer to section on output voltage select for more details.)
Output Enable. Enable = logic high; Disable = logic low
Input power supply for the controller circuitry. Connect to PVIN through a 100 Ohm resistor.
Input Voltage for the MOSFET switches.
www.altera.com/enpirion,
Page 2
03651
September 17, 2013
Rev D
EP53A8LQI/EP53A8HQI
Absolute Maximum Ratings
CAUTION:
Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended operating
conditions is not implied. Stress beyond the absolute maximum ratings may impair device life. Exposure to absolute
maximum rated conditions for extended periods may affect device reliability.
PARAMETER
Input Supply Voltage
Voltages on: ENABLE, V
SENSE
, V
SO
– V
S2
Voltages on: V
FB
(EP53A8LQI)
Maximum Operating Junction Temperature
Storage Temperature Range
Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020C
ESD Rating (based on Human Body Mode)
SYMBOL
V
IN
MIN
-0.3
-0.3
-0.3
MAX
6.0
V
IN
+ 0.3
2.7
150
150
260
2000
UNITS
V
V
V
°C
°C
°C
V
T
J-ABS
T
STG
-65
Recommended Operating Conditions
PARAMETER
Input Voltage Range
Operating Ambient Temperature
Operating Junction Temperature
SYMBOL
V
IN
T
A
T
J
MIN
2.4
- 40
- 40
MAX
5.5
+85
+125
UNITS
V
°C
°C
Thermal Characteristics
PARAMETER
Thermal Resistance: Junction to Ambient –0 LFM (Note
1)
Thermal Overload Trip Point
Thermal Overload Trip Point Hysteresis
SYMBOL
θ
JA
T
J-TP
TYP
80
+155
25
UNITS
°C/W
°C
°C
Note 1:
Based on a four layer copper board and proper thermal design per JEDEC EIJ/JESD51 standards.
www.altera.com/enpirion,
Page 3
03651
September 17, 2013
Rev D
EP53A8LQI/EP53A8HQI
Electrical Characteristics
NOTE: T
A
= -40°C to +85°C unless otherwise noted. Typical values are at T
A
= 25°C, VIN = 3.6V.
C
IN
= -4.7µF 0603 MLCC, C
OUT
= 10µF 0805 MLCC.
PARAMETER
Operating Input Voltage
Under Voltage Lock-out –
V
IN
Rising
Under Voltage Lock-out –
V
IN
Falling
Drop Out Resistance
Output Voltage Range
Dynamic Voltage Slew
Rate
VID Preset V
OUT
Initial
Accuracy
Feedback Pin Voltage
Initial Accuracy
Line Regulation
Load Regulation
Temperature Variation
Output Current
Shut-down Current
OCP Threshold
VS0-VS2, Pin Logic Low
VS0-VS2, Pin Logic High
VS0-VS2, Pin Input
Current
Enable Pin Logic Low
Enable Pin Logic High
Enable Pin Current
Feedback Pin Input
Current
Operating Frequency
Soft Start Operation
Soft Start Slew Rate
Soft Start Rise Time
SYMBOL
V
IN
V
UVLO_R
V
UVLO_F
R
DO
V
OUT
V
SLEW
∆V
OUT
TEST CONDITIONS
MIN
2.4
TYP
2.0
1.9
MAX
5.5
UNITS
V
V
V
Input to Output Resistance
EP53A8LQI (V
DO
= I
LOAD
X R
DO
)
EP53A8HQI
EP53A8HQI
EP53A8LQI
T
A
= 25°C, V
IN
= 3.6V;
I
LOAD
= 100mA ;
0.8V ≤ V
OUT
≤ 3.3V
T
A
= 25°C, V
IN
= 3.6V;
I
LOAD
= 100mA ;
0.8V ≤ V
OUT
≤ 3.3V
2.4V ≤ V
IN
≤ 5.5V
0A ≤ I
LOAD
≤ 1000mA
-40°C ≤ T
A
≤ +85°C
1000
Enable = Low
2.4V ≤ V
IN
≤ 5.5V
0.6V ≤ V
OUT
≤ 3.3V
1.25
0.0
1.4
Note 1
-2
0.6
1.8
350
500
V
IN
-V
DO
mΩ
V
V/mS
3.3
8
4
+2
%
V
FB
∆V
OUT_LINE
∆V
OUT_LOAD
∆V
OUT_TEMPL
I
OUT
I
SD
I
LIM
V
VSLO
V
VSHI
I
VSX
V
ENLO
V
ENHI
I
ENABLE
I
FB
F
OSC
.588
0.6
0.03
0.6
30
0.75
1.4
0.612
V
%/V
%/A
ppm/°C
mA
µA
A
0.3
V
IN
<100
0.3
V
V
nA
V
V
nA
nA
MHz
1.4
Note 1
Note 1
<100
<100
5
EP53A8HQI (VID only)
EP53A8LQI (VID only)
EP53A8LQI (VFB mode); Note 2
170
8
4
225
280
∆V
SS
∆T
SS
V/mS
µS
Note 1:
Parameter guaranteed by design and characterization.
Note 2:
Measured from when V
IN
≥ V
UVLO_R
& ENABLE pin crosses its logic High threshold.
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Page 4
03651
September 17, 2013
Rev D
EP53A8LQI/EP53A8HQI
Typical Performance Characteristics
Efficiency vs. Load Current: V
IN
= 5.0V, V
OUT
(from top to bottom) = 3.7, 3.3, 2.5, 1.8, 1.2V
95
85
75
Efficiency vs. Load Current: V
IN
= 3.3V, V
OUT
(from top to bottom) = 2.5, 1.8V,1.2V
95
85
75
Efficiency (%)
65
55
45
35
25
0
100
200
300
400
500
600
700
800
900 1000
Load Current (A)
Efficiency (%)
65
55
45
35
25
0
100
200
300
400
500
600
700
800
900
1000
Load Current (A)
Start Up Waveform:
V
IN
= 5.0V, V
OUT
= 3.3V; I
LOAD
= 1000mA
Shut-down Waveform:
V
IN
= 5.0V, V
OUT
= 3.3V; I
LOAD
= 1000mA
Output Ripple: VIN = 5.0V, V
OUT
= 1.2V, Load = 1A
Output Ripple: VIN = 5.0V, VOUT = 3.3V, Load = 1A
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Page 5
03651
September 17, 2013
Rev D
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