S i 3 2 1 0 / S i 3 2 11 / S i 3 2 1 2
P
R O
S LI C™ P
R O G R A M M A B L E
CMO S SL IC /C
O D E C
W I T H
R
I N G I N G
/ B
A T T E R Y
V
O L TA G E
G
E N E R A T I O N
Features
Performs all BORSCHT Functions
Ideal for Short Loop Applications
(5 REN at 2 kft, 3 REN at 4 kft)
Low Voltage CMOS
Package: 38-Pin TSSOP
Compliant with Relevant LSSGR and
CCITT Specifications
Battery Voltage Generated Dynamically
with On-Chip DC-DC Converter
Controller (Si3210 only)
5 REN Ringing Generator
Programmable Frequency, Amplitude,
Waveshape, and Cadence
Programmable AC Impedance
A-Law/µ-Law, Linear PCM Companding
On-Hook Transmission
Programmable Constant Current
Feed (20–41 mA)
Programmable Loop Closure and
Ring Trip Thresholds with Debouncing
Loop or Ground Start Operation and
Polarity Battery Reversal
Continuous Line Voltage and Current
Monitoring
DTMF Decoder
Dual Tone Generator
SPI and PCM Bus Digital Interfaces
with Programmable Interrupt for
Control and Data
3.3 V or 5 V Operation
Multiple Loopback Modes for Testing
Pulse Metering
FSK Caller ID Generation
Ordering Information
See page 118.
Pin Assignments
Si3210/11/12
CS
INT
PCLK
DRX
P
ro
S
Applications
Terminal Adaptors
Cable Telephony
PBX/Key Systems
Wireless Local Loop
Voice Over IP
Integrated Access Devices
DTX
FSYNC
RESET
SDCH/DIO1
SDCL/DIO2
VDDA1
IREF
CAPP
QGND
CAPM
STIPDC
SRINGDC
STIPE
SVBAT
SRINGE
Description
The ProSLIC™ is a low-voltage CMOS device that integrates SLIC, codec, and
battery generation functionality into a complete analog telephone interface. The
device is ideal for short loop applications such as terminal adaptors, cable telephony,
and wireless local loop. The ProSLIC is powered with a single 3.3 V or 5 V supply.
The Si3210 generates battery voltages dynamically using a software programmable
dc-dc converter from a 3.3 V to 35 V supply; negative high-voltage supplies are not
needed. All high voltage functions are performed locally with a few low cost discrete
components. The device is available in a 38-pin TSSOP and interfaces directly to
standard SPI and PCM bus digital interfaces.
Functional Block Diagram
INT
RESET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
LI
C
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
SCLK
SDI
SDO
SDITHRU
DCDRV/DCSW
DCFF/DOUT
TEST
GNDD
VDDD
ITIPN
ITIPP
VDDA2
IRINGP
IRINGN
IGMP
GNDA
IGMN
SRINGAC
STIPAC
Si3210/11/12
L ine
Status
CS
SCL K
SDO
SDI
DTX
Co ntrol
Interface
Co mpression
DTMF
Deco de
G ain/
Atte nuation/
Filter
Tone
G ene rator
G ain/
Atte nua tion /
Filter
A/D
Patents pending
TIP
D RX
PCM
Interface
Expan sio n
Progra m
Hybrid
L ine
Fe ed
Co ntrol
Low C ost
Extern al
Discretes
D/A
Z
S
RING
FSYNC
PCL K
PLL
DC-D C Co nverter Co ntrolle r
(Si3210 o nly)
Preliminary Rev. 1.11 9/01
Copyright © 2001 by Silicon Laboratories
Si3210-DS111
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si 3210/ Si3 211/S i32 12
2
Preliminary Rev. 1.11
Si3210/Si3211/Si3212
T
A B L E O F
C
O N T E N TS
Section
Page
4
21
21
27
30
33
37
38
39
42
42
42
43
46
47
50
108
108
110
111
112
113
115
118
119
122
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linefeed Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery Voltage Generation and Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tone Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ringing Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pulse Metering Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DTMF Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Audio Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Two-Wire Impedance Matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Companding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Indirect Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DTMF Decoding (Si3210 and Si3211 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Programmable Gain/Attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SLIC Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
FSK Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Descriptions: Si3210/11/12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Outline: 38-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preliminary Rev. 1.11
3
Si 3210/ Si3 211/S i32 12
Electrical Specifications
Table 1. Absolute Maximum Ratings and Thermal Information
*
Parameter
DC Supply Voltage
Input Current, Digital Input Pins
Digital Input Voltage
ESD, Si3210/11/12 (Human Body Model)
Operating Temperature Range
Storage Temperature Range
TSSOP-38 Thermal Resistance, Typical
T
A
T
STG
θ
JA
Symbol
V
DDD
, V
DDA1
, V
DDA2
Value
–0.5 to 6.0
±10
–0.3 to (
V
DDD
+ 0.3)
2000
–40 to 100
–40 to 150
50
Unit
V
mA
V
V
°C
°C
°C/W
I
IN
V
IND
*Note:
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Recommended Operating Conditions
Parameter
Ambient Temperature
Ambient Temperature
Si3210/11/12 Supply Voltage
Symbol
T
A
T
A
V
DDD
,V
DDA1
,V
DDA2
Test
Condition
K-grade
B-grade
Min*
0
–40
3.13
Typ
25
25
3.3/5.0
Max*
70
85
5.25
Unit
o
C
o
C
V
*Note:
All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.
Typical values apply at nominal supply voltages and an operating temperature of 25
o
C unless otherwise stated.
Product specifications are only guaranteed when the typical application circuit (including component tolerances) is
used.
4
Preliminary Rev. 1.11
Si3210/Si3211/Si3212
Table 3. AC Characteristics
(V
DDA
, V
DDD
= 3.13 to 5.25 V, T
A
= 0 to 70°C for K-Grade, –40 to 85°C for B-Grade)
Parameter
Test Condition
TX/RX Performance
Min
Typ
Max
Unit
Overload Level
Single Frequency Distortion
1
THD = 1.5%
2-wire – PCM or
PCM – 2-wire:
200 Hz–3.4 kHz
200 Hz to 3.4 kHz
D/A or A/D 8-bit
Active off-hook, and OHT,
any ZAC
0 dBm0, Active off-hook,
and OHT, any Zac
2.5
—
—
—
—
–45
V
PK
dB
Signal-to-(Noise + Distortion) Ratio
2
Figure 1
—
—
Audio Tone Generator
Signal-to-Distortion Ratio
2
Intermodulation Distortion
Gain Accuracy
2
45
—
—
—
0
0
—
—
—
–41
0.5
0.5
—
—
dB
dB
dB
dB
2-wire to PCM, 1014 Hz
PCM to 2-wire, 1014 Hz
–0.5
–0.5
Figure 3,4
Figure 5,6
Gain Accuracy Over Frequency
Group Delay Over Frequency
Gain Tracking
3
1014 Hz sine wave, refer-
ence level –10 dBm
signal level:
3 dB to –37 dB
–37 dB to –50 dB
–50 dB to –60 dB
Round-Trip Group Delay
Gain Step Accuracy
Gain Variation with Temperature
Gain Variation with Supply
2-Wire Return Loss
Transhybrid Balance
Idle Channel Noise
4
at 1000 Hz
–6 dB to 6 dB
All gain settings
V
DDA
= V
DDA
= 3.3/5 V ± 5%
200 Hz to 3.4 kHz
300 Hz to 3.4 kHz
Noise Performance
C-Message Weighted
Psophometric Weighted
3 kHz flat
PSRR from VDDA
PSRR from VDDD
PSRR from VBAT
RX and TX, DC to 3.4 kHz
RX and TX, DC to 3.4 kHz
RX and TX, DC to 3.4 kHz
–0.25
–0.5
–1.0
—
–0.017
–0.25
–0.1
30
30
—
—
—
1100
—
—
—
35
—
0.25
0.5
1.0
—
0.017
0.25
0.1
—
—
dB
dB
dB
µs
dB
dB
dB
dB
dB
—
—
—
40
40
40
—
—
—
—
—
—
15
–75
18
—
—
—
dBrnC
dBmP
dBrn
dB
dB
dB
Preliminary Rev. 1.11
5
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