LTC2289
Dual 10-Bit, 80Msps
Low Noise 3V ADC
FEATURES
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DESCRIPTIO
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Integrated Dual 10-Bit ADCs
Sample Rate: 80Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 422mW
61.6dB SNR at 70MHz Input
85dB SFDR at 70MHz Input
110dB Channel Isolation at 100MHz
Multiplexed or Separate Data Bus
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit)
80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit)
65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit)
40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit)
25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit)
64-Pin (9mm
×
9mm) QFN Package
The LTC
®
2289 is a 10-bit 80Msps, low noise 3V dual A/D
converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2289 is perfect for
demanding imaging and communications applications
with AC performance that includes 61.6dB SNR and 85dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include
±0.1LSB
INL (typ),
±0.1LSB
DNL (typ)
and
±0.6LSB
INL,
±0.5LSB
DNL over temperature. The
transition noise is a low 0.08LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
+
ANALOG
INPUT A
INPUT
S/H
10-BIT
PIPELINED
ADC CORE
OV
DD
OUTPUT
DRIVERS
D9A
•
•
•
–
D0A
OGND
SNR (dBFS)
CLK A
CLOCK/DUTY CYCLE
CONTROL
MUX
CLOCK/DUTY CYCLE
CONTROL
OV
DD
CLK B
+
ANALOG
INPUT B
INPUT
S/H
–
10-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D9B
•
•
•
D0B
OGND
2289 TA01
U
SNR vs Input Frequency,
–1dB, 2V Range, 80Msps
65
64
63
62
61
60
59
58
57
56
55
0
100
50
150
INPUT FREQUENCY (MHz)
200
2289 TA02
U
U
2289fa
1
LTC2289
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2289C ............................................... 0°C to 70°C
LTC2289I .............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
A
INA+
1
A
INA–
2
REFHA 3
REFHA 4
REFLA 5
REFLA 6
V
DD
7
CLKA 8
CLKB 9
V
DD
10
REFLB 11
REFLB 12
REFHB 13
REFHB 14
A
INB–
15
A
INB+
16
64 GND
63 V
DD
62 SENSEA
61 VCMA
60 MODE
59 SHDNA
58 OEA
57 OFA
56 DA9
55 DA8
54 DA7
53 DA6
52 DA5
51 DA4
50 OGND
49 OV
DD
65
48 DA3
47 DA2
46 DA1
45 DA0
44 NC
43 NC
42 NC
41 NC
40 OFB
39 DB9
38 DB8
37 DB7
36 DB6
35 DB5
34 DB4
33 DB3
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 20°C/W
EXPOSED PAD (PIN 65) IS GND AND MUST BE SOLDERED TO PCB
ORDER PART
NUMBER
LTC2289CUP
LTC2289IUP
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution
(No Missing Codes)
Integral Linearity Error
Differential
Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Offset Matching
Transition Noise
CONDITIONS
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
GND 17
V
DD
18
SENSEB 19
VCMB 20
MUX 21
SHDNB 22
OEB 23
NC 24
NC 25
NC 26
NC 27
DB0 28
DB1 29
DB2 30
OGND 31
OV
DD
32
QFN PART*
MARKING
LTC2289UP
TYP
MAX
UNITS
Bits
10
–0.6
–0.5
–12
–2.5
±0.1
±0.1
±2
±0.5
±10
±30
±5
±0.3
±2
0.08
0.6
0.5
12
2.5
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
External Reference
SENSE = 1V
●
●
●
●
mV
%FS
µV/°C
ppm/°C
ppm/°C
%FS
mV
LSB
RMS
2289fa
2
U
LSB
LSB
W
U
U
W W
W
U
LTC2289
A ALOG I PUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.7V < V
DD
< 3.4V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
Analog Input Leakage Current
SENSEA, SENSEB Input Leakage
MODE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
Figure 8 Test Circuit
0V < A
IN+
, A
IN–
< V
DD
0V < SENSEA, SENSEB < 1V
0V < MODE < V
DD
●
●
●
●
●
●
Analog Input Range (A
IN+
–A
IN–
)
Analog Input Common Mode (A
IN+
+A
IN–
)/2
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
40MHz Input
70MHz Input
140MHz Input
●
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
SFDR
Spurious Free Dynamic Range
4th Harmonic or Higher
S/(N+D)
Signal-to-Noise Plus Distortion Ratio
I
MD
Intermodulation Distortion
Crosstalk
U
W U
U
MIN
1
0.5
–1
–3
–3
TYP
±0.5
to
±1
1.5
1.5
MAX
1.9
2
1
3
3
UNITS
V
V
V
µA
µA
µA
ns
ps
RMS
dB
MHz
0
0.2
80
575
MIN
60
TYP
61.6
61.6
61.6
61.6
85
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
5MHz Input
40MHz Input
70MHz Input
140MHz Input
5MHz Input
40MHz Input
70MHz Input
140MHz Input
5MHz Input
40MHz Input
70MHz Input
140MHz Input
f
IN
= 40MHz, 41MHz
f
IN
= 100MHz
●
●
●
69
85
85
80
85
74
85
85
85
61.6
60
61.6
61.6
61.5
85
–110
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LTC2289
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
2.7V < V
DD
< 3.4V
–1mA < I
OUT
< 1mA
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
LOGIC INPUTS (CLK, OE, SHDN, MUX)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
●
4
U
U
U
U
U
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
Ω
TYP
MAX
UNITS
V
2
0.8
–10
3
10
V
µA
pF
V
IN
= 0V to V
DD
(Note 7)
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
●
●
3
50
50
2.7
2.995
2.99
0.005
0.09
2.49
0.09
1.79
0.09
0.4
pF
mA
mA
V
V
V
V
V
V
V
V
2289fa
LTC2289
POWER REQUIRE E TS
SYMBOL
V
DD
OV
DD
IV
DD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply Voltage
Output Supply Voltage
Supply Current
Power Dissipation
Shutdown Power (Each Channel)
Nap Mode Power (Each Channel)
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
CONDITIONS
(Note 9)
(Note 9)
Both ADCs at f
S(MAX)
Both ADCs at f
S(MAX)
SHDN = H, OE = H, No CLK
SHDN = H, OE = L, No CLK
●
●
●
●
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
s
t
L
t
H
t
AP
t
D
t
MD
PARAMETER
Sampling Frequency
CLK Low Time
CLK High Time
Sample-and-Hold Aperture Delay
CLK to DATA Delay
MUX to DATA Delay
Data Access Time After OE↓
BUS Relinquish Time
Pipeline Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 80MHz, input range = 2V
P-P
with differential
drive, unless otherwise noted.
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
(Note 7)
●
●
●
●
TI I G CHARACTERISTICS
U W
MIN
2.7
0.5
TYP
3
3
141
422
2
15
MAX
3.4
3.6
165
495
UNITS
V
V
mA
mW
mW
mW
UW
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
●
●
●
●
●
MIN
1
5.9
5
5.9
5
1.4
1.4
TYP
6.25
6.25
6.25
6.25
0
2.7
2.7
4.3
3.3
5
MAX
80
500
500
500
500
5.4
5.4
10
8.5
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 and 11 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 80MHz, input range = 1V
P-P
with differential
drive. The supply current and power dissipation are the sum total for both
channels with both channels active.
Note 9:
Recommended operating conditions.
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