EFM32HG108F64G-A-QFN24 datasheet, PDF

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EFM32HG108F64G-A-QFN24: DescriptionOutput state retention and wake-up from Shutoff Mode; File Size1MB，54 Pages; ManufacturerSILABS; Websitehttp://www.silabs.com

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Output state retention and wake-up from Shutoff Mode

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Preliminary

...the world's most energy friendly microcontrollers

EFM32HG108 DATASHEET

F64/F32

Preliminary

•

ARM Cortex-M0+ CPU platform

• High Performance 32-bit processor @ up to 25 MHz

• Wake-up Interrupt Controller

•

Flexible Energy Management System

• 20 nA @ 3 V Shutoff Mode

• 0.6 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out

Detector, RAM and CPU retention

• 0.9 µA @ 3 V Deep Sleep Mode, including RTC with 32.768 kHz

oscillator, Power-on Reset, Brown-out Detector, RAM and CPU

retention

• 53 µA/MHz @ 3 V Sleep Mode

• 132 µA/MHz @ 3 V Run Mode, with code executed from flash

•

64/32 KB Flash

•

8/4 KB RAM

•

17 General Purpose I/O pins

• Configurable push-pull, open-drain, pull-up/down, input filter, drive

strength

• Configurable peripheral I/O locations

• 11 asynchronous external interrupts

• Output state retention and wake-up from Shutoff Mode

•

6 Channel DMA Controller

•

6 Channel Peripheral Reflex System (PRS) for autonomous in-

ter-peripheral signaling

•

Timers/Counters

• 3× 16-bit Timer/Counter

• 3×3 Compare/Capture/PWM channels

• Dead-Time Insertion on TIMER0

• 1× 24-bit Real-Time Counter

• 1× 16-bit Pulse Counter

• Watchdog Timer with dedicated RC oscillator @ 50 nA

•

Communication interfaces

• 2× Universal Synchronous/Asynchronous Receiv-

er/Transmitter

• UART/SPI/SmartCard (ISO 7816)/IrDA/I2S

• Triple buffered full/half-duplex operation

• Low Energy UART

• Autonomous operation with DMA in Deep Sleep

Mode

• I C Interface with SMBus support

• Address recognition in Stop Mode

•

Ultra low power precision analog peripherals

• 1× Analog Comparator

• Capacitive sensing with up to 2 inputs

• Supply Voltage Comparator

•

Ultra efficient Power-on Reset and Brown-Out Detec-

tor

•

Debug Interface

• 2-pin Serial Wire Debug interface

• Micro Trace Buffer (MTB)

•

Pre-Programmed UART Bootloader

•

Temperature range -40 to 85 ºC

•

Single power supply 1.98 to 3.8 V

•

QFN24 package

• Preliminary - This datasheet revision applies to a product

under development

32-bit ARM Cortex-M0+, Cortex-M3 and Cortex-M4 microcontrollers for:

• Energy, gas, water and smart metering

• Health and fitness applications

• Smart accessories

• Alarm and security systems

• Industrial and home automation

Preliminary

...the world's most energy friendly microcontrollers

There is also a read-only page in the information block containing system and device calibration data.

Read and write operations are supported in the energy modes EM0 and EM1.

2.1.4 Direct Memory Access Controller (DMA)

The Direct Memory Access (DMA) controller performs memory operations independently of the CPU.

This has the benefit of reducing the energy consumption and the workload of the CPU, and enables

the system to stay in low energy modes when moving for instance data from the USART to RAM or

from the External Bus Interface to a PWM-generating timer. The DMA controller uses the PL230 µDMA

controller licensed from ARM.

2.1.5 Reset Management Unit (RMU)

The RMU is responsible for handling the reset functionality of the EFM32HG.

2.1.6 Energy Management Unit (EMU)

The Energy Management Unit (EMU) manage all the low energy modes (EM) in EFM32HG microcon-

trollers. Each energy mode manages if the CPU and the various peripherals are available. The EMU

can also be used to turn off the power to unused SRAM blocks.

2.1.7 Clock Management Unit (CMU)

The Clock Management Unit (CMU) is responsible for controlling the oscillators and clocks on-board the

EFM32HG. The CMU provides the capability to turn on and off the clock on an individual basis to all

peripheral modules in addition to enable/disable and configure the available oscillators. The high degree

of flexibility enables software to minimize energy consumption in any specific application by not wasting

power on peripherals and oscillators that are inactive.

2.1.8 Watchdog (WDOG)

The purpose of the watchdog timer is to generate a reset in case of a system failure, to increase appli-

cation reliability. The failure may e.g. be caused by an external event, such as an ESD pulse, or by a

software failure.

2.1.9 Peripheral Reflex System (PRS)

The Peripheral Reflex System (PRS) system is a network which lets the different peripheral module

communicate directly with each other without involving the CPU. Peripheral modules which send out

Reflex signals are called producers. The PRS routes these reflex signals to consumer peripherals which

apply actions depending on the data received. The format for the Reflex signals is not given, but edge

triggers and other functionality can be applied by the PRS.

2.1.10 Inter-Integrated Circuit Interface (I2C)

The I C module provides an interface between the MCU and a serial I C-bus. It is capable of acting as

both a master and a slave, and supports multi-master buses. Both standard-mode, fast-mode and fast-

mode plus speeds are supported, allowing transmission rates all the way from 10 kbit/s up to 1 Mbit/s.

Slave arbitration and timeouts are also provided to allow implementation of an SMBus compliant system.

The interface provided to software by the I C module, allows both fine-grained control of the transmission

process and close to automatic transfers. Automatic recognition of slave addresses is provided in all

energy modes.

2.1.11 Universal Synchronous/Asynchronous Receiver/Transmitter (US-

ART)

The Universal Synchronous Asynchronous serial Receiver and Transmitter (USART) is a very flexible

serial I/O module. It supports full duplex asynchronous UART communication as well as RS-485, SPI,

MicroWire and 3-wire. It can also interface with ISO7816 SmartCards, IrDA and I2S devices.

2015-05-06 - EFM32HG108FXX - _Rev0.91

www.silabs.com

Preliminary

...the world's most energy friendly microcontrollers

2.1.12 Pre-Programmed UART Bootloader

The bootloader presented in application note AN0003 is pre-programmed in the device at factory. Auto-

baud and destructive write are supported. The autobaud feature, interface and commands are described

further in the application note.

2.1.13 Low Energy Universal Asynchronous Receiver/Transmitter

(LEUART)

The unique LEUART , the Low Energy UART, is a UART that allows two-way UART communication on

a strict power budget. Only a 32.768 kHz clock is needed to allow UART communication up to 9600 baud/

s. The LEUART includes all necessary hardware support to make asynchronous serial communication

possible with minimum of software intervention and energy consumption.

2.1.14 Timer/Counter (TIMER)

The 16-bit general purpose Timer has 3 compare/capture channels for input capture and compare/Pulse-

Width Modulation (PWM) output. TIMER0 also includes a Dead-Time Insertion module suitable for motor

control applications.

2.1.15 Real Time Counter (RTC)

The Real Time Counter (RTC) contains a 24-bit counter and is clocked either by a 32.768 kHz crystal

oscillator, or a 32.768 kHz RC oscillator. In addition to energy modes EM0 and EM1, the RTC is also

available in EM2. This makes it ideal for keeping track of time since the RTC is enabled in EM2 where

most of the device is powered down.

2.1.16 Pulse Counter (PCNT)

The Pulse Counter (PCNT) can be used for counting pulses on a single input or to decode quadrature

encoded inputs. It runs off either the internal LFACLK or the PCNTn_S0IN pin as external clock source.

The module may operate in energy mode EM0 - EM3.

2.1.17 Analog Comparator (ACMP)

The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indi-

cating which input voltage is higher. Inputs can either be one of the selectable internal references or from

external pins. Response time and thereby also the current consumption can be configured by altering

the current supply to the comparator.

2.1.18 Voltage Comparator (VCMP)

The Voltage Supply Comparator is used to monitor the supply voltage from software. An interrupt can

be generated when the supply falls below or rises above a programmable threshold. Response time and

thereby also the current consumption can be configured by altering the current supply to the comparator.

2.1.19 General Purpose Input/Output (GPIO)

In the EFM32HG108, there are 17 General Purpose Input/Output (GPIO) pins, which are divided into

ports with up to 16 pins each. These pins can individually be configured as either an output or input. More

advanced configurations like open-drain, filtering and drive strength can also be configured individually

for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM

outputs or USART communication, which can be routed to several locations on the device. The GPIO

supports up to 11 asynchronous external pin interrupts, which enables interrupts from any pin on the

device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other

peripherals.

2015-05-06 - EFM32HG108FXX - _Rev0.91

www.silabs.com

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