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SI5342

Description
10-CHANNEL, ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATOR/CLOCK MULTIPLIER
File Size1MB,62 Pages
ManufacturerSILABS
Websitehttp://www.silabs.com
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SI5342 Overview

10-CHANNEL, ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATOR/CLOCK MULTIPLIER

S i5345/44/4 2
10 -C
H A N N E L
, A
N Y
- F
R E Q U E N C Y
, A
N Y
-O
U T P U T
J
I T T E R
A
T T E N U A T O R
/ C
L O C K
M
U L T I P L I E R
Features
Generates any combination of output
Optional zero delay mode
frequencies from any input frequency
Fastlock feature for low nominal
Input frequency range:
bandwidths

Differential: 8 kHz to 750 MHz
Glitchless on the fly output frequency

LVCMOS: 8 kHz to 250 MHz
changes
Output frequency range:
DCO mode: as low as 0.001 ppb steps.

Differential: up to 712.5 MHz
Core voltage

LVCMOS: up to 250 MHz

V
DD
: 1.8 V ±5%
Ultra-low jitter:

V
DDA
: 3.3 V ±5%
<100 fs typ (12 kHz–20 MHz)
Independent output clock supply pins:
Programmable jitter attenuation
3.3 V, 2.5 V, or 1.8 V
bandwidth from 0.1 Hz to 4 kHz
Output-output skew: 20 ps typ
Meets G.8262 EEC Opt 1, 2 (SyncE)
Serial interface: I
2
C or SPI
Highly configurable outputs compatible
In-circuit programmable with
with LVDS, LVPECL, LVCMOS, CML,
non-volatile OTP memory
and HCSL with programmable signal
ClockBuilder Pro
TM
software simplifies
amplitude
device configuration
Status monitoring (LOS, OOF, LOL)
Hitless input clock switching: automatic
Si5345: 4 input, 10 output, 64 QFN
Si5344: 4 input, 4 output, 44 QFN
or manual
Si5342: 4 input, 2 output, 44 QFN
Locks to gapped clock inputs
Temperature range: –40 to +85 °C
Automatic free-run and holdover
Pb-free, RoHS-6 compliant
modes
Ordering Information:
See section 8
Functional Block Diagram
Device Selector Guide
Grade
Si534fA
Si534fB
Si534fC
Si534fD
Max Output Frequency
712.5 MHz
350 MHz
712.5 MHz
350 MHz
Frequency Synthesis Modes
Integer+Fractional
Integer+Fractional
Integer
Integer
Applications
OTN Muxponders and Transponders
10/40/100G networking line cards
GbE/10GbE/100GbE Synchronous
Ethernet (ITU-T G.8262)
Carrier Ethernet switches
SONET/SDH Line Cards
Broadcast video
Test and measurement
ITU-T G.8262 (SyncE) Compliant
Description
These jitter attenuating clock multipliers combine fourth-generation DSPLL and
MultiSynth™ technologies to enable any-frequency clock generation and jitter
attenuation for applications requiring the highest level of jitter performance. These
devices are programmable via a serial interface with in-circuit programmable non-
volatile memory (NVM) so they always power up with a known frequency configuration.
They support free-run, synchronous, and holdover modes of operation, and offer both
automatic and manual input clock switching. The loop filter is fully integrated on-chip,
eliminating the risk of noise coupling associated with discrete solutions. Further, the
jitter attenuation bandwidth is digitally programmable, providing jitter performance
optimization at the application level. Programming the Si5345/44/42 is easy with Silicon
Labs’
ClockBuilder Pro
software. Factory preprogrammed devices are also available.
Rev. 1.0 7/15
Copyright © 2015 by Silicon Laboratories
Si5345/44/42

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