Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Soldering Temperature (reflow) .......................................+260°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifica-
tions do not apply when operating the device beyond its rated operating conditions.
Note 2:
Human Body Model, 100pF discharged through a 1.5kΩ resistor.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(T
A
= -40°C to +125°C, V
CC
= 3.0V to 5.5V, unless otherwise noted. Typical values are at T
A
= +25°C, V
CC
= 3.3V.) (Note 3)
PARAMETER
Operating Supply Voltage
Operating Supply Current
Quiescent Supply Current
V
FAN
Supply Voltage
V
FANHI
V
FANLO
V
GND
+ 10V < V
DACOUT_
< 11.5V,
V
FAN
= 12V
V
GND
+ 3V < V
DACOUT_
< 10V,
V
FAN
= 12V
I
DACOUT_
= 5mA
V
FAN
= V
FANHI
DAC Feedback Voltage at Half
Scale
DAC
FBHS
At DACFB_,
code = 0x100,
I
DACOUT_
= 5mA
V
FAN
= V
FANLO
V
FAN
= 12V
V
FAN
= 5V
DAC Feedback Voltage at Full
Scale
Drive Voltage Resolution
DACFB_ Impedance
TACH Minimum Input Pulse Width
Internal Reference Frequency
Accuracy
TACH Count Accuracy (Note 4)
2
SYMBOL
V
CC
I
CC
V
CC
= 5.5V
I
2
C inactive
CONDITION
MIN
3.0
TYP
0.25
0.2
3
MAX
5.5
0.60
0.5
20
13.5
5.5
UNITS
V
mA
mA
µA
V
Shutdown mode
10
4.0
-18
12
5.0
DACOUT_ Output Current
I
DACOUT_
mA
-16
0.05
256/535
256/567
5.54
2.05
5.74
2.25
511/535
511/567
11.25
4.3
11.45
4.5
9
1
25
11.65
4.7
Bit
MΩ
µs
+3
+0.1
+2
%
%
V
5.94
2.45
V
V
FAN
-
0.1
V
DACOUT_ Output Voltage
V
DACOUT_
At DACFB_,
code = 0x1FF,
V
DACFB511
I
DACOUT_
= 5mA
DAC
FBFS
V
FAN
= V
FANHI
V
FAN
= V
FANLO
V
FAN
= 12V
V
FAN
= 5V
R
DACFB
(Note 4)
Using 32.768kHz crystal
Using on-chip oscillator
-3
-0.1
-2
Maxim Integrated
MAX6620
Quad Linear Fan-Speed Controller
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +125°C, V
CC
= 3.0V to 5.5V, unless otherwise noted. Typical values are at T
A
= +25°C, V
CC
= 3.3V.) (Note 3)
PARAMETER
Fan Control Accuracy (Note 4)
XTAL Oscillator Startup Time
X1 Input Threshold
POR Threshold
V
CC
V
FAN
V
CC
x
0.7
V
CC
x
0.3
1.0
-1.0
All digital inputs
I
OL
= 3mA
V
CC
-
0.5
0.5
1.0
-1.0
All digital inputs
f
SCL
t
BUF
t
HD:STA
t
SU:STO
t
LOW
t
HIGH
t
SU:STA
t
SU:DAT
t
DH
t
HD:DAT
t
R
t
R
(Note 6)
(Note 8)
(Note 7)
1.3
0.6
600
1.3
0.6
600
100
100
0
300
20 + 0.1
x C
B
0.9
6
400
6
100
0.4
SYMBOL
CONDITION
Using 32.768kHz crystal, test at 850RPM
Using on-chip oscillator
MIN
-1
-3
2
0.7
2
3.5
TYP
MAX
+1
+3
UNITS
%
s
V
V
LOGIC (SDA, SCL,
FAN_FAIL,
WD_START, TACH_)
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input Capacitance
Output High Current
Output Low Voltage
LOGIC (DAC_START, SPIN_START, ADDR)
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input Capacitance
I
2
C-COMPATIBLE TIMING (Notes 5, 6)
Serial Clock Frequency
Bus Free Time Between STOP
and START Conditions
START Condition Hold Time
STOP Condition Setup Time
Clock Low Period
Clock High Period
START Condition Setup Time
Data Setup Time
Data Out Hold Time
Data In Hold Time
Maximum Receive SCL/SDA Rise
Time
Minimum Receive SCL/SDA Rise
Time
kHz
µs
µs
ns
µs
µs
ns
ns
ns
µs
ns
ns
V
IH
V
IL
I
IH
I
IL
V
V
µA
µA
pF
V
IH
V
IL
I
IH
I
IL
V
V
µA
µA
pF
µA
V
Maxim Integrated
3
MAX6620
Quad Linear Fan-Speed Controller
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +125°C, V
CC
= 3.0V to 5.5V, unless otherwise noted. Typical values are at T
A
= +25°C, V
CC
= 3.3V.) (Note 3)
PARAMETER
Maximum Receive SCL/SDA Fall
Time
Minimum Receive SCL/SDA Fall
Time
Transmit SDA Fall Time
Pulse Width of Suppressed Spike
Output Fall Time
SDA Time Low for Reset of Serial
Interface
t
TIMEOUT
SYMBOL
t
F
t
F
t
F
t
SP
(Note 7)
(Note 7)
(Note 8)
C
L
= 400pF, I
OUT
= 3mA
(Note 9)
20
20 + 0.1
x C
B
0
CONDITION
MIN
TYP
300
20 + 0.1
x C
B
250
50
250
50
MAX
UNITS
ns
ns
ns
ns
ns
ms
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
All parts will operate properly over the V
CC
supply voltage range of 3.0V to 5.5V.
Guaranteed by design and characterization.
All timing specifications are guaranteed by design.
A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s falling edge.
C
B
= total capacitance of one bus line in pF. Tested with C
B
= 400pF.
Input filters on SDA and SCL suppress noise spikes less than 50ns.
Holding the SDA line low for a time greater than t
TIMEOUT
will cause the devices to reset SDA to the idle state of the serial
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