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88F6281

Description
High-performance single-issue CPU
File Size278KB,2 Pages
ManufacturerMaxell
Websitehttp://www.maxell.com
Download Datasheet View All

88F6281 Overview

High-performance single-issue CPU

Marvell 88F6281 SoC with Sheeva Technology
Kirkwood Series
PRODUCT OVERVIEW
The Marvell
®
88F6281 SoC with Sheeva™ embedded CPU technology, is a high-performance integrated controller. It
integrates the Marvell Sheeva CPU core which is fully ARMv5TE-compliant with a 256KB L2 Cache. The 88F6281 builds
upon Marvell’s innovative Feroceon
®
family of processors, improves performance, and adds new features to reduce bill of
materials (BOM) costs. The 88F6281 is suitable for a wide range of applications such as routers, gateway, media server,
storage, set-top-box, networking, point of service and printer products.
The 88F6281 offers unparalleled integration that makes system design simple and cost efficient. The SoC integrates:
High-performance single-issue CPU
1.0 Ghz - 1.2 Ghz operating speed
16KB-Instruction and 16KB-Data 4-way, set-associative L1 cache
256KB unified 4-way, set-associative L2 cache
16-bit DDR2 memory interface (up to 800 MHz data rate)
Two Gigabit Ethernet MACs with interface options
Precise Timing Protocol and Audio Video Bridging
Single PCI-Express port
Single USB 2.0 port with integrated PHY
Two SATA 2.0 ports with integrated PHYs
Network security engine with various encryption algorithm support
Audio and MPEG Transport Stream Interface
Two TDM Channels, SDIO, NAND flash, SPI, TWSI, and Two UART interfaces
The innovative, on-chip crossbar architecture with any-to-any connectivity enables concurrent transactions among multiple
units that results in high system throughput allowing system designers to create high-performance scalable systems.
Tightly integrated CPU and memory controller significantly improves application performance.
BLOCK DIAGRAM
Sheeva™ CPU Core
Single Issue
16KB-I, 16KB-D
1.0–1.2GHz
256KB L2
DDR II
Controller
2 x GE
MAC
2 x SATA II
with PHY
USB 2.0
with PHY
PCI-E
System Crossbar
2 x TDM
channels
MPEG_TS
& Audio
SDIO
Security
Engine
4 IDMA/
XOR
NAND Ctlr
2 x UART
TWSI, SPI
Fig 1. 88F6281 SoC Block Diagram
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