DF6F6.8MCTC
ESD Protection Diodes
Silicon Epitaxial Planar
DF6F6.8MCTC
1. Applications
•
ESD Protection
This product is designed for protection against electrostatic discharge (ESD) and is not intended for any other
purpose, including, but not limited to, voltage regulation.
Note:
2. Features
(1)
(2)
(3)
ESD protection for up to 4 high-speed data lines and 1 Bus line.
Ultra compact packaging for easy configuration in any ESD protection circuits.
Low Input/output-to-ground capacitance: C
t-GND
(1) = 0.6 pF (typ.).
3. Packaging and Internal Circuit Pin Assignment
1: I/O 1
2: GND
3: I/O 2
4: I/O 3
5: V
BUS
6: I/O 4
CST6C
25
4. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
Characteristics
Junction temperature
Storage temperature
Symbol
T
j
T
stg
Note
Rating
150
-55 to 150
Unit
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
1
2012-05-24
Rev.2.0
DF6F6.8MCTC
5. Electrical Characteristics (Unless otherwise specified, T
a
= 25
)
25
Characteristics
Working peak reverse voltage
Reverse breakdown voltage
Symbol
V
RWM
V
BR
(1)
V
BR
(2)
Reverse current
I
R
(1)
I
R
(2)
Input/output-to-ground
capacitance
C
t-GND
(1)
C
t-GND
(2)
Input/output-to-ground
capacitance difference
Total capacitance
∆C
t-GND
C
t
Note 1
Note
I
R
= 5 mA
(Between I/O - GND pins)
I
R
= 5 mA
(Between V
BUS
- GND pin)
V
RWM
= 5 V
(Between I/O - GND pins)
V
RWM
= 5 V
(Between V
BUS
- GND pin)
V
R
= 0 V, f = 1 MHz
(Between I/O - GND pins)
V
R
= 0 V, f = 1 MHz
(Between V
BUS
- GND pin)
V
R
= 0 V, f = 1 MHz
(Between I/O - GND pins)
V
R
= 0 V, f = 1 MHz
(Between I/O - I/O pins)
Test Condition
Min
6.0
6.8
Typ.
0.6
67
0.01
0.3
Max
5.0
0.5
0.5
1.0
pF
µA
Unit
V
Note1: Guaranteed by design.
6. Guaranteed ESD Protection (Note)
Test Condition
IEC61000-4-2 (Contact discharge)
ESD Protection
±8
kV
Note:
Criterion: No damage to devices.
7. Marking
Fig. 7.1 Marking
Marking Code
RA
Part Number
DF6F6.8MCTC
2
2012-05-24
Rev.2.0
DF6F6.8MCTC
8. Land Pattern Dimensions for Reference Only
Fig. 8.1 Land Pattern Dimensions for Reference Only (Unit: mm)
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2012-05-24
Rev.2.0
DF6F6.8MCTC
9. Characteristics Curves (Note)
Fig. 9.1 I
R
- V
BR
(Between I/O - GND pins)
Fig. 9.2 I
R
- V
R
(Between I/O - GND pins)
Fig. 9.3 C
t
- V
R
(Between I/O - GND pins)
Fig. 9.4 V
C
- I
PP
(Between I/O - GND pins)
Note:
The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
4
2012-05-24
Rev.2.0
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