VAC31, VBC31 Series
14 Pin and 8 Pin / HCMOS/TTL / VCXO Oscillator
Lead-Free
RoHS Compliant
C A L I B E R
Electronics Inc.
PART NUMBERING GUIDE
Package
VAC31 = 14 Pin Dip / HCMOS-TTL / VCXO
VBC31 = 8 Pin Dip / HCMOS-TTL / VCXO
Inclusive Tolerance/Stability
100= +/-100ppm, 50= +/-50ppm, 25= +/-25ppm,
20= +/-20ppm, 10= ±10ppm
Operating Temperature Range
Blank = 0°C to 70°C, 27 = -20°C to 70°C, 48 = -40°C to 85°C
Supply Voltage
Blank = 5.0Vdc ±5%, A=3.3Vdc ±5%
Environmental/Mechanical Specifications on page F5
VAC31 100 48 A T A B A - 155.520MHz
Control Voltage
A=2.5Vdc ±2.0Vdc / B=2.5Vdc ±2.5Vdc
If Using 3.3Vdc Option =1.65Vdc ±1.65Vdc
Linearity
A=5% / B=10% / C=15% / D=20%
Frequency Deviation (Over Controll Voltage
A=±50ppm / B=±100ppm / C=±150ppm / D=±200ppm /
E=±250ppm / F=±300ppm / G=±350ppm
Duty Cycle
Blank=40-60% / T=45-55%
ELECTRICAL SPECIFICATIONS
Frequency Range (Full Size / 14 Pin Dip)
Frequency Range (Half Size / 8 Pin Dip)
Operating Temperature Range
Storage Temperature Range
Supply Voltage
Aging (at 25°C)
Load Drive Capability
Start Up Time
Pin 1 Control Voltage (Positive Transfer Characteristic)
Linearity
Revision: 1998-B
1.500MHz to 160.000MHz
1.000MHz to 40.000MHz
0°C to 70°C / -20°C to 70°C / -40°C to 85°C
-55°C to 125°C
5.0Vdc ±5%, 3.3Vdc ±5%
±5ppm / year Maximum
10TTL Load or 15pF HCMOS Load Maximum
10mSeconds Maximum
A=2.5Vdc ±2.0Vdc / B=2.5Vdc ±2.5Vdc
±20%, ±15%, ±10% Maximum
±5% Maximum (not available with 200ppm
frequency deviation)
1.000MHz to 20.000MHz
20.001MHz to 30.000MHz
30.001MHz to 160.000MHz
<40.000MHz / ±25pSeconds Maximum
< 40.000MHz / ±100pSeconds Maximum
Inclusive of Operating Temperature Range, Supply
Voltage and Load
w/TTL Load
w/HCMOS Load
w/TTL Load
w/HCMOS Load
0.4Vdc to 2.4Vdc w/TTL Load; 20% to 80% of
Waveform w/HCMOS Load
@1.4Vdc w/TTL Load; @50% w/HCMOS Load
@1.4Vdc w/TTL Load or w/HCMOS Load
30mA Maximum
40mA Maximum
50mA Maximum
>40.000MHz / ±50pSeconds Maximum
>40.000MHz / ±200pSeconds Maximum
±100ppm, ±50ppm, ±30ppm, ±25ppm, ±20ppm
(20ppm = 0°C to 70°C Only)
Input Current
One Sigma Clock Jitter
Absolute Clock Jitter
Frequency Tolerance / Stability
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise Time / Fall Time
Duty Cycle
Frequency Deviation Over Control Voltage
2.4Vdc Minimum
Vdd –0.5Vdc Minimum
0.4Vdc Maximum
0.5Vdc Maximum
5nSeconds Maximum
50 ±10% (Standard)
50±5% (Optional)
A=±50ppm Min. / B=±100ppm Min. / C=±150ppm Min. / D=±200ppm Min. / E=±250ppm Min. /
F=±300ppm Min. / G=±350ppm Min.
MECHANICAL DIMENSIONS
13.2
MAX
Marking Guide on page F3-F4
13.2
0.9
MAX
MAX
7.620
±.203
7.620
±0.203
5.08
MIN
20.8
MAX
15.240 14 1
±0.203
8
7
0.457
±0.1
(X4)
13.2
MAX
7.620
±0.203
8
5
1
4
0.457±01
(X4)
5.08
0.8 ±0.1
14 Pin Full Size
All Dimensions in mm.
Pin 1: Control Voltage (Vc)
Pin 7: Case Ground
MAX
Insulated Standoffs
(Glass)
8 Pin Half Size
Insulated Standoffs
All Dimensions in mm.
Pin 1: Control Voltage (Vc)
Pin 4: Case Ground
(X3)
5.08
MIN
5.6
MAX
Pin 8: Output
Pin 14: Supply Voltage
Pin 5: Output
Pin 8: Supply Voltage
TEL
949-366-8700
FAX
949-366-8707
WEB
http://www.caliberelectronics.com
FPGA/CPLD
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