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EDI8F32259C12MNCC

Description
SRAM,
Categorystorage    storage   
File Size162KB,7 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

EDI8F32259C12MNCC Overview

SRAM,

EDI8F32259C12MNCC Parametric

Parameter NameAttribute value
Objectid102821985
package instruction,
Reach Compliance Codeunknown
ECCN codeEAR99
EDI8F32259C
256Kx32 Static RAM CMOS, High Speed Module
FEATURES
• 256Kx32 bit CMOS Static RAM
• Access Times: 12, 15, 20, and 25ns
• Individual Byte Selects
• Fully Static, No Clocks
• TTL Compatible I/O
• High Density Package with JEDEC Standard Pinouts
• 72 Pin SIMM No. 175 (Angle)
• 72 Pin ZIP No. 176
• 72 Pin SIMM, No. 354 (Straight)
• Single +5V (±10%) Supply Operation
DESCRIPTION
The EDI8F32259C is a high speed 8Mb Static RAM module
organized as 256K words by 32 bits. This module is constructed
from eight 256Kx4 Static RAMs in SOJ packages on an epoxy
laminate (FR4) board.
Four chip enables (EØ-E3) are used to independently enable the
four bytes. Reading or writing can be executed on individual
bytes or any combination of multiple bytes through proper use of
selects.
The EDI8F32259C is offered in 72 pin ZIP/SIMM package which
enables eight megabits of memory to be placed in less than 1.3
square inches of board space.
All inputs and outputs are TTL compatible and operate from a
single 5V supply. Fully asynchronous circuitry requires no clocks
or refreshing for operation and provides equal access and cycle
times for ease of use.
The ZIP and SIMM modules contain four PD (Presence Detect)
pins which are used to identify module memory density in appli-
cations where alternate modules can be interchanged.
FIG. 1
PIN CONFIGURATIONS AND BLOCK DIAGRAM
AØ-A17
EØ-E3
W,
G
DQØ-DQ31
VCC
VSS
PIN NAMES
Address Inputs
Chip Enables
Write Enables
Output Enable
Common Data Input/Output
Power (+5V±10%)
Ground
0
PD 1,2 = VSS
PD 3,4 = Open
Aug. 2001 Rev. 2
ECO #14562
1
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
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