SPP5413
P-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPP5413 is the P-Channel logic enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology. The SPP5413 has
been designed specifically to improve the overall
efficiency of DC/DC converters using either synchronous
or conventional switching PWM controllers. It has been
optimized for low gate charge, low R
DS(ON)
and fast
switching speed.
APPLICATIONS
Power Management in Note book
Powered System
DC/DC Converter
Load Switch
FEATURES
-40V/-10A,R
DS(ON)
= 26mΩ@V
GS
=- 10V
-40V/- 8A,R
DS(ON)
= 36mΩ@V
GS
=- 4.5V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
TO-252 package design
PIN CONFIGURATION
TO-252
PART MARKING
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Ver.3
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SPP5413
P-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
Symbol
G
S
D
Description
Gate
Source
Drain
ORDERING INFORMATION
Part Number
Package
Part
Marking
SPP5413T252RGB
TO-252
※
SPP5413T252RGB : Tape Reel ; Pb – Free ; Halogen - Free
SPP5413
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol
V
DSS
V
GSS
I
D
I
DM
I
S
P
D
EAS
T
J
T
STG
R
θJA
Typical
-40
±20
Unit
V
V
A
A
A
W
mJ
-18
-10
-30
-2.3
2.8
1.8
129
Avalanche Energy with Single Pulse
( Tj=25℃, L = 0.14mH , I
AS
= 43A , V
DD
= 20V. )
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
-55/150
-55/150
70
℃
℃
℃/W
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SPP5413
P-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=-250uA
V
GS(th)
V
DS
=V
GS
,I
D
=-250uA
I
GSS
I
DSS
I
D(on)
R
DS(on)
gfs
V
SD
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DD
=-20V,R
L
=4Ω
I
D
≡-5.0A,V
GEN
=-4.5V
R
G
=1Ω
V
DS
=-20V,V
GS
=0V
f=1MHz
V
DS
=0V,V
GS
=±20V
V
DS
=-32V,V
GS
=0V
V
DS
=-32V,V
GS
=0V
T
J
=55℃
V
DS
= -5V,V
GS
=-4.5V
V
GS
=-10V,I
D
=-10A
V
GS
=-4.5V,I
D
=- 8A
V
DS
=-15V,I
D
=-5.7A
I
S
=-2.3A,V
GS
=0V
-40
-0.8
-2.5
±100
-1
-10
-10
0.021
0.030
13
-0.8
13
4.5
6.5
1100
145
115
40
55
30
12
80
100
60
20
0.026
0.036
-1.2
20
V
nA
uA
A
Ω
S
V
V
DS
=-20V,V
GS
=-4.5V
I
D
= -5.0A
nC
pF
nS
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Ver.3
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SPP5413
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2011/09/ 26
Ver.3
Page 4
SPP5413
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2011/09/ 26
Ver.3
Page 5