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JX5022A0010.000000

Description
LVPECL Output Clock Oscillator, 10MHz Min, 400MHz Max, 10MHz Nom, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size953KB,2 Pages
ManufacturerDiodes Incorporated
Environmental Compliance
Download Datasheet Parametric View All

JX5022A0010.000000 Overview

LVPECL Output Clock Oscillator, 10MHz Min, 400MHz Max, 10MHz Nom, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN

JX5022A0010.000000 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid4000465405
package instructionSOLCC6,.12
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresENABLE/DISABLE FUNCTION
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
Installation featuresSURFACE MOUNT
Number of terminals6
Maximum operating frequency400 MHz
Minimum operating frequency10 MHz
Nominal operating frequency10 MHz
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
Oscillator typeLVPECL
Output load50 OHM
Package body materialCERAMIC
Encapsulate equivalent codeSOLCC6,.12
physical size5.0mm x 3.2mm x 1.2mm
power supply2.5 V
Certification statusNot Qualified
longest rise time0.35 ns
Maximum slew rate60 mA
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Obsolete – Part Discontinued, Use NX502
Ultra Low Jitter PLL Crystal Oscillator 5.0 x 3.2mm
2.5V/3.3V LVPECL XO
JX502
5.0 x 3.2mm Ceramic SMD
Package:
(Scale: none, Dimensions are in mm)
Product Features
• Very low phase jitter - 0.8ps RMS typical
• Thicker crystal for improved reliability
• Low supply current - 60mA max.
• Industrial Temperature Range
Pb-free & RoHS compliant
Fast lead time
Recommended Land Pattern:
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
Product Description
The JX502 XO series is a high performance
LVPECL crystal oscillator family with very
low jitter performance. It supports various
options including wider frequency range,
2.5V/3.3V voltage, and various stabilities.
It is designed to meet the clock source
specifications for communication systems,
and other high performance equipment.
Pin Functions:
Pin
Function
1
2
3
4
5
6
OE Function
N/C
Ground
Q
Q
V
CC
Applications
• Networking systems
• Servers and storage systems
• Profession video equipments
• Test and measurement
• FPGA/ASIC clock generation
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
*Extended high frequency power decoupling is recommended (see test circuit for minimum
recommendation). To ensure optimal performance, do not route RF traces beneath the
package.
Part Ordering Information:
JX 50 2
V
A
I
FFFF.FFFFFF
C
B
Voltage:
Stability and Temp Range:
Stability
A = +/-20 ppm
B = +/-25 ppm
C = +/-50 ppm
D = +/-25 ppm
E = +/-50 ppm
Temp Range
-20/+70°C
-20/+70°C
-20/+70°C
-40/+85°C
-40/+85°C
1=+3.3V
2=+2.5V
Frequency:
FFFF.FFFFFF
MHz, “4 digits/decimal/6 digits” format
SaRonix-eCera™ is a Pericom® Semiconductor company
US: +1-408-435-0800 TW: +886-3-4518888
www.pericom.com
12-0057
All specifications are subject to change without notice.
JX502
Rev C
10/30/12
1
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