PD - 97214D
Applications
l
High Efficiency Synchronous Rectification in
SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
IRFB3307ZPbF
IRFS3307ZPbF
IRFSL3307ZPbF
HEXFET
®
Power MOSFET
D
Benefits
l
Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l
Fully Characterized Capacitance and
Avalanche SOA
l
Enhanced body diode dV/dt and dI/dt
Capability
S
V
DSS
R
DS(on)
typ.
max.
I
D (Silicon Limited)
I
D (Package Limited)
D
75V
4.6m
Ω
5.8m
Ω
128A
120A
D
c
D
G
D
S
G
S
G
D
S
TO-220AB
IRFB3307ZPbF
D
2
Pak
IRFS3307ZPbF
TO-262
IRFSL3307ZPbF
G
D
S
Gate
Drain
Max.
Source
Units
A
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
d
f
128
90
120
512
230
1.5
± 20
6.7
-55 to + 175
300
10lbf in (1.1N m)
140
See Fig. 14, 15, 22a, 22b
W
W/°C
V
V/ns
°C
x
x
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Ãd
e
g
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case
Case-to-Sink, Flat Greased Surface , TO-220
Junction-to-Ambient, TO-220
Junction-to-Ambient (PCB Mount) , D
2
Pak
k
Parameter
Typ.
–––
0.50
–––
–––
Max.
0.65
–––
62
40
Units
°C/W
k
jk
www.irf.com
1
08/19/11
IRFB/S/SL3307ZPbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
ΔV
(BR)DSS
/ΔT
J
R
DS(on)
V
GS(th)
R
G(int)
I
DSS
I
GSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Internal Gate Resistance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
75
–––
–––
2.0
–––
Conditions
–––
0.094
4.6
–––
0.70
–––
–––
–––
–––
–––
–––
5.8
4.0
–––
20
250
100
-100
V V
GS
= 0V, I
D
= 250μA
V/°C Reference to 25°C, I
D
= 5mA
mΩ V
GS
= 10V, I
D
= 75A
V V
DS
= V
GS
, I
D
= 150μA
g
d
Ω
–––
–––
–––
–––
μA
nA
V
DS
= 75V, V
GS
= 0V
V
DS
= 75V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
320
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
79
19
24
55
15
64
38
65
4750
420
190
440
410
–––
110
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
V
DS
= 50V, I
D
= 75A
I
D
= 75A
V
DS
= 38V
V
GS
= 10V
I
D
= 75A, V
DS
=0V, V
GS
= 10V
V
DD
= 49V
I
D
= 75A
R
G
= 2.6Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V
V
GS
= 0V, V
DS
= 0V to 60V
g
ns
pF
g
h
i
j
h
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
––– 128
–––
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
A
Ãdi
512
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
––– –––
1.3
V
–––
33
50
ns
–––
39
59
–––
42
63
nC
T
J
= 125°C
–––
56
84
–––
2.2
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 75A, V
GS
= 0V
T
J
= 25°C
V
R
= 64V,
T
J
= 125°C
I
F
= 75A
di/dt = 100A/μs
T
J
= 25°C
g
g
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.050mH
R
G
= 25Ω, I
AS
= 75A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
75A, di/dt
≤
1570A/μs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400μs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
2
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IRFB/S/SL3307ZPbF
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
4.5V
4.5V
10
10
≤
60μs PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
1
0.1
1
≤
60μs PULSE WIDTH
Tj = 175°C
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 2.
Typical Output Characteristics
2.5
ID = 72A
2.0
VGS = 10V
ID, Drain-to-Source Current (A)
100
T J = 175°C
10
T J = 25°C
1.5
1
VDS = 25V
≤60μs
PULSE WIDTH
2
3
4
5
6
7
8
1.0
0.1
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
12.0
ID= 72A
VGS, Gate-to-Source Voltage (V)
10.0
8.0
6.0
4.0
2.0
0.0
C, Capacitance (pF)
VDS= 60V
VDS= 38V
VDS= 15V
10000
Ciss
1000
Coss
Crss
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0
10
20
30
40
50
60
70
80
90
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFB/S/SL3307ZPbF
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
T J = 175°C
1000
100
100μsec
10
T J = 25°C
1msec
10
10msec
1
VGS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
VSD, Source-to-Drain Voltage (V)
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
1
10
VDS, Drain-to-Source Voltage (V)
100
0.1
Fig 7.
Typical Source-Drain Diode Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
140
120
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
100
Id = 5mA
95
90
85
80
75
70
65
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
100
80
60
40
20
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Limited By Package
Fig 9.
Maximum Drain Current vs. Case Temperature
1.2
1.0
0.8
Fig 10.
Drain-to-Source Breakdown Voltage
600
EAS , Single Pulse Avalanche Energy (mJ)
500
400
300
200
100
0
ID
TOP
15A
26A
BOTTOM 75A
Energy (μJ)
0.6
0.4
0.2
0.0
20
30
40
50
60
70
80
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
4
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
www.irf.com
IRFB/S/SL3307ZPbF
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
τ
C
τ
τ
3
Thermal Response ( Z thJC )
0.01
τ
1
τ
2
Ri (°C/W)
τi
(sec)
0.1164 0.000088
0.3009 0.001312
0.2313
0.009191
Ci=
τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
0.01
Duty Cycle =
Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Δ
Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
0.05
10
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
150
125
100
75
50
25
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 75A
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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EAR , Avalanche Energy (mJ)
5
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