A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD110800/ALD110800A/ALD110900/ALD110900A
VGS(th)= +0.00V
e
TM
EPAD
E
N
®
AB
LE
D
QUAD/DUAL N-CHANNEL ZERO THRESHOLD™ EPAD
®
PRECISION MATCHED PAIR MOSFET ARRAY
GENERAL DESCRIPTION
ALD110800A/ALD110800/ALD110900A/ALD110900 are high precision
monolithic quad/dual N-Channel MOSFETs matched at the factory using
ALD’s proven EPAD CMOS technology. These devices are members of
the EPAD
®
Matched Pair MOSFET Family.
Intended for low voltage small signal applications, the ALD110800/
ALD110900 features Zero-Threshold
™
voltage, which reduces or elimi-
nates input to output voltage level shift, including circuits where the signal
is referenced to GND or V+. This feature greatly reduces output signal
voltage level shift and enhances signal operating range, especially for
very low operating voltage environments. With these zero threshold de-
vices, an analog circuit with multiple stages can be constructed to oper-
ate at extremely low supply or bias voltage levels. For example, an input
amplifier stage operating at 0.2V supply voltage has been demonstrated.
ALD110800A/ALD110800/ALD110900A/ALD110900 matched pair
MOSFETs are designed for exceptional device electrical characteristics
matching with the threshold voltage set precisely at +0.00V +0.01V, fea-
turing a typical offset voltage of only +0.001V (1mV). As these devices
are on the same monolithic chip, they also exhibit excellent tempco track-
ing characteristics. They are versatile as design components for a broad
range of analog applications such as basic building blocks for current
sources, differential amplifier input stages, transmission gates, and multi-
plexer applications.
Besides matched pair electrical characteristics, each individual MOSFET
also exhibits well controlled parameters, enabling the user to depend on
tight design limits. Even units from different batches and different date
of manufacture have correspondingly well matched characteristics.
These devices are built for minimum offset voltage and differential ther-
mal response, and they are designed for switching and amplifying appli-
cations in +0.2V to +10V systems where low input bias current, low input
capacitance, and fast switching speed are desired. The V
GS(th)
of these
devices is set at +0.00V, which classifies them as both enhancement mode
and depletion mode devices. When the gate is set at 0.00V, the drain
current is +1µA @ V
DS
= 0.1V, which allows a class of circuits with output
voltage level biased at or near input voltage level without voltage level
shift. These devices exhibit well controlled turn-off and sub-threshold
characteristics of standard enhancement mode MOSFETs.
The ALD110800A/ALD110800/ALD110900A/ALD110900 are MOSFET
devices that feature high input impedance (10
12
Ω)
and high DC current
gain (>10
8
). A sample calculation of the DC current gain at a drain current
of 3mA and input leakage current of 30pA at 25°C is 3mA/30pA =
100,000,000. For most applications, connect the V+ pin to the most posi-
tive voltage and the V- and IC pins to the most negative voltage in the
system. All other pins must have voltages within these voltage limits at all
times.
ORDERING INFORMATION
(“L” suffix
denotes lead-free (RoHS))
Operating Temperature Range*
0°C to +70°C
0°C to +70°C
16-Pin
SOIC
Package
ALD110800ASCL
ALD110800SCL
FEATURES
• Precision zero threshold voltage mode
• Nominal R
DS(ON)
@V
GS
=0.00V of 104KΩ
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• V
GS(th)
match (V
OS
) to 2mV and 10mV max.
• Positive, zero, and negative V
GS(th)
tempco
• Low input capacitance
• Low input/output leakage currents
APPLICATIONS
• Energy harvesting circuits
• Very low voltage analog and digital circuits
• Zero power fail safe circuits
• Backup battery circuits & power failure detector
• Low level voltage clamp & zero crossing detector
• Source followers and buffers
• Precision current mirrors and current sources
• Capacitives probes and sensor interfaces
• Charge detectors and charge integrators
• Differential amplifier input stage
• High side switches
• Peak detectors and level shifters
• Sample and Hold
• Current multipliers
• Analog switches / multiplexers
• Voltage comparators and level shifters
PIN CONFIGURATIONS
ALD110800
IC*
G
N1
D
N1
S
12
V
-
D
N4
G
N4
IC*
1
2
3
4
5
6
7
8
V
-
V
-
V
-
M4
M3
M1
M2
V
-
V
-
16
15
14
IC*
G
N2
D
N2
V
+
S
34
D
N3
G
N3
IC*
V
+
13
12
11
10
9
SCL, PCL PACKAGES
ALD110900
IC*
G
N1
1
2
3
4
M1
M2
V-
V-
8
7
6
IC*
G
N2
D
N2
V-
16-Pin
Plastic Dip
Package
ALD110800APCL
ALD110800PCL
8-Pin
SOIC
Package
ALD110900ASAL
ALD110900SAL
8-Pin
Plastic Dip
Package
ALD110900APAL
ALD110900PAL
D
N1
S
12
V-
SAL, PAL PACKAGES
5
* Contact factory for industrial temp. range or user-specified threshold voltage values.
*IC pins are internally connected, connect to V-
Rev 2.1 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, VDS
10.6V
Gate-Source voltage, VGS
10.6V
Power dissipation
500 mW
Operating temperature range SCL, PCL, SAL, PAL package
0°C to +70°C
Storage temperature range
-65°C to +150°C
Lead temperature, 10 seconds
+260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V V- = GND TA = 25
°
C unless otherwise specified
ALD110800A/ALD110900A
Parameter
Gate Threshold Voltage
Offset Voltage
VGS(th)1-VGS(th)2
Offset Voltage Tempco
GateThreshold Voltage Tempco
Symbol
VGS(th)
VOS
TCVOS
TCVGS(th)
Min
-0.01
Typ
0.00
1
Max
0.01
2
ALD110800/ALD110900
Min
-0.02
Typ
0.00
2
Max
0.02
10
Unit
V
mV
Test Conditions
IDS =1µA, VDS = 0.1V
5
-1.7
0.0
+1.6
12.0
3.0
1.4
5
-1.7
0.0
+1.6
12.0
3.0
1.4
µV/°C
mV/°C
VDS1 = VDS2
ID = 1µA, VDS = 0.1V
ID = 20µA, VDS = 0.1V
ID = 40µA, VDS = 0.1V
VGS = +9.5V, VDS = +5V
VGS = +4.0V, VDS = +5V
VGS = +4.0V
VDS = +9.0V
On Drain Current
IDS (ON)
GFS
mA
Forward Transconductance
mmho
Transconductance Mismatch
Output Conductance
∆G
FS
GOS
RDS (ON)
1.8
68
1.8
68
%
µmho
VGS = +4.0V
VDS = +9.0V
VDS = +0.1V
VGS = +4.0V
VDS = +0.1V
VGS = +0.0V
VDS = +0.1V
VGS = +4.0V
Drain Source On Resistance
500
500
Ω
Drain Source On Resistance
RDS (ON)
104
104
KΩ
Drain Source On Resistance
Tolerance
Drain Source On Resistance
Mismatch
Drain Source Breakdown
Voltage
Drain Source Leakage Current
1
∆R
DS (ON)
5
5
%
∆R
DS (ON)
BVDSX
IDS (OFF)
10
0.5
0.5
%
10
V
IDS = 1.0µA
V-= VGS = -1.0V
VGS = -1.0V, VDS =+5V
V- = -5V
TA = 125°C
VDS = 0V VGS = +5V
TA =125°C
10
400
4
10
400
4
pA
nA
pA
nA
pF
pF
ns
ns
dB
Gate Leakage Current
1
IGSS
CISS
CRSS
ton
toff
5
200
1
5
200
1
Input Capacitance
Transfer Reverse Capacitance
Turn-on Delay Time
Turn-off Delay Time
Crosstalk
Notes:
1
2.5
0.1
10
10
60
2.5
0.1
10
10
60
V+ = 5V RL= 5KΩ
V+ = 5V RL= 5KΩ
f = 100KHz
Consists of junction leakage currents
ALD110800/ALD110800A/ALD110900/ALD110900A
Advanced Linear Devices
2 of 11
PERFORMANCE CHARACTERISTICS OF EPAD®
PRECISION MATCHED PAIR MOSFET FAMILY
ALD1108xx/ALD1109xx/ALD1148xx/ALD1149xx are monolithic
quad/dual N-Channel MOSFETs matched at the factory using ALD’s
proven EPAD® CMOS technology. These devices are intended for
low voltage, small signal applications.
ALD’s Electrically Programmable Analog Device (EPAD) technol-
ogy provides the industry’s only family of matched transistors with
a range of precision threshold values. All members of this family
are designed and actively programmed for exceptional matching of
device electrical characteristics. Threshold values range from -
3.50V Depletion to +3.50V Enhancement devices, including stan-
dard products specified at -3.50V, -1.30V, -0.40V, +0.00V, +0.20V,
+0.40V, +0.80V, +1.40V, and +3.30V. ALD can also provide any
customer desired value between -3.50V and +3.50V. For all these
devices, even the depletion and zero threshold transistors, ALD
EPAD technology enables the same well controlled turn-off, sub-
threshold, and low leakage characteristics as standard enhance-
ment mode MOSFETs. With the design and active programming,
even units from different batches and different date of manufacture
have well matched characteristics. As these devices are on the
same monolithic chip, they also exhibit excellent tempco tracking.
This EPAD MOSFET Array product family (EPAD MOSFET) is avail-
able in the three separate categories, each providing a distinctly
different set of electrical specifications and characteristics. The first
category is the ALD110800/ALD110900 Zero-Threshold
™
mode
EPAD MOSFETs. The second category is the ALD1108xx/
ALD1109xx enhancement mode EPAD MOSFETs. The third cat-
egory is the ALD1148xx/ALD1149xx depletion mode EPAD
MOSFETs. (The suffix “xx” denotes threshold voltage in 0.1 V steps,
for example, xx=08 denotes 0.80V).
The ALD110800/ALD110900 (quad/dual) are EPAD MOSFETs in
which the individual threshold voltage of each MOSFET is fixed at
zero. The threshold voltage is defined as I
DS
= 1uA @ V
DS
= 0.1V
when the gate voltage V
GS
= 0.00V. Zero threshold devices oper-
ate in the enhancement region when operated above threshold volt-
age and current level (V
GS
> 0.00V and I
DS
> 1uA) and subthresh-
old region when operated at or below threshold voltage and cur-
rent level (V
GS
<= 0.00V and I
DS
< 1uA). This device, along with
other very low threshold voltage members of the product family,
constitute a class of EPAD MOSFETs that enable ultra low supply
voltage operation and nanopower type of circuit designs, applicable
in either analog or digital circuits.
The ALD1108xx/ALD1109xx (quad/dual) product family features
precision matched enhancement mode EPAD MOSFET devices,
which require a positive bias voltage to turn on. Precision threshold
values such as +1.40V, +0.80V, +0.20V are offered. No conductive
channel exists between the source and drain at zero applied gate
voltage for these devices, except that the +0.20V version has a
subthreshold current at about 20nA.
The ALD1148xx/ALD1149xx (quad/dual) features depletion mode
EPAD MOSFETs, which are normally-on devices when the gate
bias voltage is at zero volt. The depletion mode threshold voltage
is at a negative voltage level at which the EPAD MOSFET turns off.
Without a supply voltage and/or with V
GS
= 0.0V the EPAD
MOSFET device is already turned on and exhibits a defined and
controlled on-resistance between the source and drain terminals.
The ALD1148xx/ALD1149xx depletion mode EPAD MOSFETs are
different from most other types of depletion mode MOSFETs and
certain types of JFETs in that they do not exhibit high gate leakage
currents and channel/junction leakage currents. When negative
signal voltages are applied to the gate terminal, the designer/user
can depend on the EPAD MOSFET device to be controlled, modu-
lated and turned off precisely. The device can be modulated and
turned-off under the control of the gate voltage in the same manner
as the enhancement mode EPAD MOSFET and the same device
equations apply.
EPAD MOSFETs are ideal for minimum offset voltage and differen-
tial thermal response, and they are used for switching and amplify-
ing applications in low voltage (1V to 10V or +/-0.5V to +/-5V) or
ultra low voltage (less than 1V or +/- 0.5V) systems. They feature
low input bias current (less than 30pA max.), ultra low power
(microWatt) or Nanopower (power measured in nanoWatt) opera-
tion, low input capacitance and fast switching speed. These de-
vices can be used where a combination of these characteristics
are desired.
KEY APPLICATION ENVIRONMENT
EPAD( MOSFET Array products are for circuit applications in one
or more of the following operating environments:
* Low voltage: 1V to 10V or +/- 0.5V to +/- 5V
* Ultra low voltage: less than 1V or +/- 0.5V
* Low power: voltage x current = power measured in microwatt
* Nanopower: voltage x current = power measured in nanowatt
* Precision matching and tracking of two or more MOSFETs
ELECTRICAL CHARACTERISTICS
The turn-on and turn-off electrical characteristics of the EPAD
MOSFET products are shown in the Drain-Source On Current vs
Drain-Source On Voltage and Drain-Source On Current vs Gate-
Source Voltage graphs. Each graph show the Drain-Source On
Current versus Drain-Source On Voltage characteristics as a func-
tion of Gate-Source voltage in a different operating region under
different bias conditions. As the threshold voltage is tightly speci-
fied, the Drain-Source On Current at a given gate input voltage is
better controlled and more predictable when compared to many
other types of MOSFETs.
EPAD MOSFETs behave similarly to a standard MOSFET, there-
fore classic equations for a n-channel MOSFET applies to EPAD
MOSFET as well. The Drain current in the linear region (V
DS
<
V
GS
- V
GS(th)
) is given by:
I
D
= u . C
OX
. W/L . [V
GS
- V
GS(th)
- V
DS
/2] . V
DS
where:
u = Mobility
C
OX
= Capacitance / unit area of Gate electrode
V
GS
= Gate to Source voltage
V
GS(th)
= Turn-on threshold voltage
V
DS
= Drain to Source voltage
W = Channel width
L = Channel length
In this region of operation the I
DS
value is proportional to V
DS
value
and the device can be used as gate-voltage controlled resistor.
For higher values of V
DS
where V
DS
>= V
GS
- V
GS(th)
, the satura-
tion current I
DS
is now given by (approx.):
I
DS
= u . C
OX
. W/L . [V
GS
- V
GS(th)
]2
3 of 11
ALD110800/ALD110800A/ALD110900/ALD110900A
Advanced Linear Devices
PERFORMANCE CHARACTERISTICS OF EPAD®
PRECISION MATCHED PAIR MOSFET FAMILY (cont.)
SUB-THRESHOLD REGION OF OPERATION
Low voltage systems, namely those operating at 5V, 3.3V or less,
typically require MOSFETs that have threshold voltage of 1V or
less. The threshold, or turn-on, voltage of the MOSFET is a voltage
below which the MOSFET conduction channel rapidly turns off. For
analog designs, this threshold voltage directly affects the operating
signal voltage range and the operating bias current levels.
At or below threshold voltage, an EPAD MOSFET exhibits a turn-
off characteristic in an operating region called the subthreshold re-
gion. This is when the EPAD MOSFET conduction channel rapidly
turns off as a function of decreasing applied gate voltage. The con-
duction channel induced by the gate voltage on the gate electrode
decreases exponentially and causes the drain current to decrease
exponentially. However, the conduction channel does not shut off
abruptly with decreasing gate voltage, but decreases at a fixed rate
of approximately 116mV per decade of drain current decrease. Thus
if the threshold voltage is +0.20V, for example, the drain current is
1uA at V
GS
= +0.20V. At V
GS
= +0.09V, the drain current would
decrease to 0.1uA. Extrapolating from this, the drain current is
0.01uA (10nA) at V
GS
= -0.03V, 1nA at V
GS
= -0.14V, and so forth.
This subthreshold characteristic extends all the way down to cur-
rent levels below 1nA and is limited by other currents such as junc-
tion leakage currents.
At a drain current to be declared “zero current” by the user, the Vgs
voltage at that zero current can now be estimated. Note that using
the above example, with V
GS(th)
= +0.20V, the drain current still
hovers around 20nA when the gate is at zero volt, or ground.
ZERO TEMPERATURE COEFFICIENT (ZTC) OPERATION
For an EPAD MOSFET in this product family, there exist operating
points where the various factors that cause the current to increase
as a function of temperature balance out those that cause the cur-
rent to decrease, thereby canceling each other, and resulting in net
temperature coefficient of near zero. One of this temperature stable
operating point is obtained by a ZTC voltage bias condition, which
is 0.55V above a threshold voltage when V
GS
= V
DS
, resulting in a
temperature stable current level of about 68uA. For other ZTC op-
erating points, see ZTC characteristics.
PERFORMANCE CHARACTERISTICS
Performance characteristics of the EPAD MOSFET product family
are shown in the following graphs. In general, the threshold voltage
shift for each member of the product family causes other affected
electrical characteristics to shift with an equivalent linear shift in
V
GS(th)
bias voltage. This linear shift in V
GS
causes the subthresh-
old I-V curves to shift linearly as well. Accordingly, the subthreshold
operating current can be determined by calculating the gate volt-
age drop relative from its threshold voltage, V
GS(th)
.
RDS(ON) AT VGS=GROUND
Several of the EPAD MOSFETs produce a fixed resistance when
their gate is grounded. For ALD110800, the drain current at V
DS
=
0.1V is at 1uA at V
GS
= 0.0V. Thus just by grounding the gate of the
ALD110800, a resistor with R
DS(ON)
= ~100KOhm is produced.
When an ALD114804 gate is grounded, the drain current I
DS
= 18.5
uA@ V
DS
= 0.1V, producing R
DS(ON)
= 5.4KOhm. Similarly,
ALD114813 and ALD114835 produces 77uA and 185uA, respec-
tively, at V
GS
= 0.0V, producing R
DS(ON)
values of 1.3KOhm and
540Ohm, respectively.
LOW POWER AND NANOPOWER
When supply voltages decrease, the power consumption of a given
load resistor decreases as the square of the supply voltage. So
one of the benefits in reducing supply voltage is to reduce power
consumption. While decreasing power supply voltages and power
consumption go hand-in-hand with decreasing useful AC bandwidth
and at the same time increases noise effects in the circuit, a circuit
designer can make the necessary tradeoffs and adjustments in any
given circuit design and bias the circuit accordingly.
With EPAD MOSFETs, a circuit that performs a specific function
can be designed so that power consumption can be minimized. In
some cases, these circuits operate in low power mode where the
power consumed is measure in micro-watts. In other cases, power
dissipation can be reduced to nano-watt region and still provide a
useful and controlled circuit function operation.
MATCHING CHARACTERISTICS
A key benefit of using matched-pair EPAD MOSFET is to maintain
temperature tracking. In general, for EPAD MOSFET matched pair
devices, one device of the matched pair has gate leakage currents,
junction temperature effects, and drain current temperature coeffi-
cient as a function of bias voltage that cancel out similar effects of
the other device, resulting in a temperature stable circuit. As men-
tioned earlier, this temperature stability can be further enhanced by
biasing the matched-pairs at Zero Tempco (ZTC) point, even though
that could require special circuit configuration and power consump-
tion design consideration.
ALD110800/ALD110800A/ALD110900/ALD110900A
Advanced Linear Devices
4 of 11
TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
5
DRAIN SOURCE ON CURRENT
(mA)
DRAIN-SOURCE ON RESISTANCE
vs. DRAIN-SOURCE ON CURRENT
2500
T
A
= +25°C
4
VGS-VGS(TH)=+5V
DRAIN-SOURCE ON RESISTANCE
(Ω)
TA = 25°C
VGS-VGS(TH)=+4V
2000
1500
VGS = VGS(TH) +4V
3
VGS-VGS(TH)=+3V
2
VGS-VGS(TH)=+2V
1000
500
VGS = VGS(TH) +6V
1
VGS-VGS(TH)=+1V
0
0
2
4
6
8
10
0
10
100
1000
10000
DRAIN-SOURCE ON VOLTAGE (V)
DRAIN-SOURCE ON CURRENT (µA)
FORWARD TRANSFER CHARACTERISTICS
DRAIN- SOURCE ON CURRENT
(mA )
20
2.5
VGS(TH) = -3.5V
TRANSCONDUCTANCE vs.
AMBIENT TEMPERATURE
TRANSCONDUCTANCE
(mA/V)
15
T
A
= 25°C
V
DS
= +10V
VGS(TH) = -1.3V
VGS(TH) = -0.4V
2.0
1.5
1.0
0.5
0
10
VGS(TH) = 0.0V
VGS(TH) = +0.2V
5
VGS(TH) = +1.4V
VGS(TH) = +0.8V
0
-4
-2
0
2
4
6
8
10
-50
-25
0
25
50
75
100
125
GATE-SOURCE VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
DRAIN-SOURCE ON CURRENT
(nA)
10000
1000
VGS(TH)=-1.3V
TA = +25°C
VDS=+0.1V
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
DRAIN-SOURCE ON CURRENT
(nA)
100000
VGS(TH)=0.0V
1000
100
10
1
0.1
V
DS
=0.1V
Slope ~ 110mV/decade
=
10
1
0.1
0.01
-4
-3
-2
VGS(TH)=-3.5V
VGS(TH)=+0.2V
VGS(TH)=+0.8V
VGS(TH)=+1.4V
100
VGS(TH)=-0.4V
0.01
V
GS(th)
-1
0
1
2
-0.5
V
GS(th)
-0.4
V
GS(th)
-0.3
V
GS(th)
-0.2
V
GS(th)
-0.1
V
GS(th)
GATE-SOURCE VOLTAGE (V)
GATE-SOURCE VOLTAGE (V)
ALD110800/ALD110800A/ALD110900/ALD110900A
Advanced Linear Devices
5 of 11
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