TSEV83102G0BGL datasheet, PDF - EEWORLD Datasheet

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TSEV83102G0BGL: Description1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152; Categorysemiconductor logic; File Size1MB，56 Pages; ManufacturerAtmel (Microchip)

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TSEV83102G0BGL Overview

1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152

TSEV83102G0BGL Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	152
Rated supply voltage	5 V
Maximum linear error	0.3906 %
Maximum limit analog input voltage	0.1370 V
Minimum limit analog input voltage	-0.1370 V
Processing package description	21 × 21 MM, 1.27 MM PITCH, Ceramic, BGA-152
state	ACTIVE
packaging shape	SQUARE
Package Size	GRID array
surface mount	Yes
Terminal form	BALL
Terminal spacing	1.27 mm
terminal coating	NOT SPECIFIED
Terminal location	BOTTOM
Packaging Materials	Ceramic, Metal-SEALED COFIRED
Rated negative supply voltage	-5 V
Sampling Rate	2000 MHz
Output format	Parallel, WORD
Type of converter	proprietary method
Number of digits	10
Output bit encoding	binary
Number of analog channels	1
Sample and hold and track and hold	SAMPLE

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Features

•

Up to 2 Gsps Sampling Rate

Power Consumption: 4.6 W

500 mVpp Differential 100

Ω

or Single-ended 50

Ω (±2

%) Analog Inputs

Differential 100

Ω

or Single-ended 50

Ω

Clock Inputs

ECL or LVDS Output Compatibility

Ω

Differential Outputs with Common Mode not Dependent on Temperature

ADC Gain Adjust

Sampling Delay Adjust

Offset Control Capability

Data Ready Output with Asynchronous Reset

Out-of-range Output Bit

Selectable Decimation by 32 Functions

Gray or Binary Selectable Output Data; NRZ Output Mode

Pattern Generator Output (for Acquisition System Monitoring)

Radiation Tolerance Oriented Design (More Than 100 Krad (Si) Expected)

CBGA 152 Cavity Down Hermetic Package

CBGA Package Evaluation Board TSEV83102G0BGL

Companion Device: DMUX 8-/10-bit 1:4/1:8 2 Gsps TS81102G0

10-bit 2 Gsps

ADC

TS83102G0B

Performance

•

3.3 GHz Full Power Input Bandwidth (-3 dB)

Gain Flatness: ± 0.2 dB (from DC up to 1.5 GHz)

Low Input VSWR: 1.2 Max from DC to 2.5 GHz

SFDR = -59 dBc; 7.6 Effective Bits at F

= 1.4 Gsps, F

= 700 MHz [-1 dBFS]

SFDR = -53 dBc; 7.1 Effective Bits at Fs = 1.4 Gsps, F

= 1950 MHz [-1 dBFS]

SFDR = -54 dBc; 6.5 Effective Bits at F

= 2 Gsps, F

= 2 GHz [-1 dBFS]

Low Bit Error Rate (10

-12

) at 2 Gsps

Application

•

Direct RF Down Conversion

Wide Band Satellite Receiver

High-speed Instrumentation

High-speed Acquisition Systems

High-energy Physics

Automatic Test Equipment

Radar

Screening

•

Temperature Range for Packaged Device:

– “C” grade: 0° C < Tc; Tj < 90° C

– “V” grade: -20° C < Tc; Tj < 110° C

Standard Die Flow (upon Request)

•

Description

The TS83102G0B is a monolithic 10-bit analog-to-digital converter, designed for digi-

tizing wide bandwidth analog signals at very high sampling rates of up to 2 Gsps. It

uses an innovative architecture, including an on-chip Sample and Hold (S/H). The

3.3 GHz full power input bandwidth and band flatness performances enable the digitiz-

ing of high IF and large bandwidth signals.

2101D–BDC–06/04

TSEV83102G0BGL Related Products

	TSEV83102G0BGL	TS83102G0B	TS83102G0BCGL	TS83102G0BVGL
Description	1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152	1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152	1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152	1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152
Number of functions	1	1	1	1
Number of terminals	152	152	152	152
surface mount	Yes	Yes	YES	YES
Terminal form	BALL	BALL	BALL	BALL
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Output format	Parallel, WORD	Parallel, WORD	PARALLEL, WORD	PARALLEL, WORD
Number of digits	10	10	10	10

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