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935279032132

Description
NAND Gate, AUP/ULP/V Series, 1-Func, 2-Input, CMOS, PDSO6
Categorylogic    logic   
File Size120KB,18 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
Download Datasheet Parametric View All

935279032132 Overview

NAND Gate, AUP/ULP/V Series, 1-Func, 2-Input, CMOS, PDSO6

935279032132 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid4002401977
package instructionVSON,
Reach Compliance Codecompliant
seriesAUP/ULP/V
JESD-30 codeR-PDSO-N6
JESD-609 codee3
length1.45 mm
Logic integrated circuit typeNAND GATE
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)24 ns
Maximum seat height0.5 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1 mm
74AUP1G38
Low-power 2-input NAND gate (open drain)
Rev. 5 — 29 November 2011
Product data sheet
1. General description
The 74AUP1G38 provides the single 2-input NAND gate with open-drain output. The
output of the device is an open drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
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