19-1908; Rev 0; 5/01
KIT
ATION
EVALU
E
BL
AVAILA
Quad LVDS Line Receivers with
Integrated Termination
General Description
Features
o
Integrated Termination Eliminates Four External
Resistors (MAX9126)
o
Pin Compatible with DS90LV032A
o
Guaranteed 500Mbps Data Rate
o
300ps Pulse Skew (max)
o
Conform to ANSI TIA/EIA-644 LVDS Standard
o
Single +3.3V Supply
o
Low 70µA Shutdown Supply Current
o
Fail-Safe Circuit
MAX9125/MAX9126
The MAX9125/MAX9126 quad low-voltage differential
signaling (LVDS) line receivers are ideal for applica-
tions requiring high data rates, low power, and reduced
noise. The MAX9125/MAX9126 are guaranteed to
receive data at speeds up to 500Mbps (250MHz) over
controlled-impedance media of approximately 100Ω.
The transmission media may be printed circuit (PC)
board traces or cables.
The MAX9125/MAX9126 accept four LVDS differential
inputs and translate them to 3.3V CMOS outputs. The
MAX9126 features integrated parallel termination resis-
tors (nominally 115Ω), which eliminate the requirement
for four discrete termination resistors and reduce stub
length. The MAX9125 inputs are high impedance and
require an external termination resistor when used in a
point-to-point connection.
The devices support a wide common-mode input range
of 0.05V to 2.35V, allowing for ground potential differ-
ences and common-mode noise between the driver
and the receiver. A fail-safe feature sets the output high
when the inputs are open, or when the inputs are
undriven and shorted or parallel terminated. The EN
and
EN
inputs control the high-impedance output and
are common to all four receivers. Inputs conform to the
ANSI TIA/EIA-644 LVDS standard. The MAX9125/
MAX9126 operate from a single +3.3V supply, are
specified for operation from -40°C to +85°C, and are
available in 16-pin TSSOP and SO packages. Refer to
the MAX9124 data sheet for a quad LVDS line driver.
Ordering Information
PART
MAX9125EUE
MAX9125ESE
MAX9126EUE
MAX9126ESE
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
16 TSSOP
16 SO
16 TSSOP
16 SO
Typical Application Circuit
LVDS SIGNALS
MAX9126
MAX9124
Applications
Digital Copiers
Laser Printers
Cellular Phone Base Stations
Add/Drop Muxes
Digital Cross-Connects
DSLAMs
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Pin Configuration appears at end of data sheet.
LVTTL/LVCMOS
DATA INPUT
T
X
115Ω
R
X
T
X
115Ω
R
X
LVTTL/LVCMOS
DATA OUTPUT
T
X
115Ω
R
X
T
X
115Ω
R
X
100Ω SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Quad LVDS Line Receivers with
Integrated Termination
MAX9125/MAX9126
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +4.0V
IN_+, IN_- to GND .................................................-0.3V to +4.0V
EN,
EN
to GND ...........................................-0.3V to (V
CC
+ 0.3V)
OUT_ to GND .............................................-0.3V to (V
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
16-Pin TSSOP (derate 9.4mW/°C above +70°C) .........755mW
16-Pin SO (derate 8.7mW/°C above +70°C)................696mW
Storage Temperature Range .............................-65°C to +150°C
Maximum Junction Temperature .....................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Lead Temperature (soldering, 10s) .................................+300°C
ESD Protection (Human Body Model) IN_+, IN_-, OUT_............±7.5kV
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, differential input voltage
|
V
ID
|
= 0.1V to 1.0V, common-mode voltage V
CM
=
|
V
ID
/2
|
to 2.4V -
|
V
ID
/2
|
, T
A
=
-40°C to +85°C. Typical values are at V
CC
= +3.3V, T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
LVDS INPUTS (IN_+, IN_-)
Differential Input High Threshold
Differential Input Low Threshold
Input Current (MAX9125)
Power-Off Input Current
(MAX9125)
Input Resistor 1
Input Resistor 2
Differential Input Resistance
(MAX9126)
LVCMOS/LVTTL OUTPUTS (OUT_)
I
OH
=
-4.0mA
(MAX9125)
Output High Voltage
V
OH
I
OH
=
-4.0mA
(MAX9126)
Output Low Voltage
Output Short-Circuit Current
Output High-Impedance Current
V
OL
I
OS
I
OZ
Open, undriven short, or
undriven 100Ω parallel
termination
V
ID
= +100mV
Open or undriven short
V
ID
= +100mV
2.7
2.7
2.7
2.7
3.2
3.2
3.2
3.2
0.1
-15
-10
0.25
-120
+10
V
mA
µA
V
V
TH
V
TL
I
IN
_+,
I
IN
_-
I
IN
_+,
I
IN
_-
R
IN1
R
IN2
R
DIFF
0.1V
≤V
ID
≤
0.6V,
0.6V
<V
ID
≤
1.0V
0.1V
≤V
ID
≤
0.6V, V
CC
= 0
0.6V
<V
ID
≤
1.0V, V
CC
= 0
V
CC
= +3.6V or 0, Figure 1
V
CC
= +3.6V or 0, Figure 1
V
CC
= +3.6V or 0, Figure 1
-100
-20
-25
-20
-25
35
132
90
115
132
20
25
20
25
100
mV
mV
µA
µA
kΩ
kΩ
Ω
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
I
OL
= +4.0mA, V
ID
= -100mV
Enabled, V
ID
= +100mV, V
OUT
_ = 0 (Note 2)
Disabled, V
OUT
_ = 0 or V
CC
2
_______________________________________________________________________________________
Quad LVDS Line Receivers with
Integrated Termination
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, differential input voltage
|
V
ID
|
= 0.1V to 1.0V, common-mode voltage V
CM
=
|
V
ID
/2
|
to 2.4V -
|
V
ID
/2
|
, T
A
=
-40°C to +85°C. Typical values are at V
CC
= +3.3V, T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
LOGIC INPUTS (EN,
EN)
Input High Voltage
Input Low Voltage
Input Current
SUPPLY
Supply Current
Disabled Supply Current
I
CC
I
CCZ
Enabled, inputs open
Disabled, inputs open
9
70
15
500
mA
µA
V
IH
V
IL
I
IN
V
IN
= V
CC
or 0
2.0
0
-15
V
CC
0.8
15
V
V
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX9125/MAX9126
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, C
L
= 10pF, differential input voltage
|
V
ID
|
= 0.2V to 1.0V, common-mode voltage V
CM
=
|
V
ID
/2
|
to 2.4V
-
|
V
ID
/2
|
, input rise and fall time = 1ns (20% to 80%), input frequency = 100MHz, T
A
= -40°C to +85°C. Typical values are at V
CC
=
+3.3V, V
CM
= 1.2V,
|
V
ID
|
= 0.2V, T
A
= +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
Differential Propagation Delay
High to Low
Differential Propagation Delay
Low to High
Differential Pulse Skew
[t
PHLD
- t
PLHD
] (Note 5)
Differential Channel-to-Channel
Skew (Note 6)
Differential Part-to-Part Skew
(Note 7)
Differential Part-to-Part Skew
(Note 8)
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Maximum Operating Frequency
(Note 9)
SYMBOL
t
PHLD
t
PLHD
t
SKD1
t
SKD2
t
SKD3
t
SKD4
t
TLH
t
THL
t
PHZ
t
PLZ
t
PZH
t
PZL
f
MAX
CONDITIONS
Figures 2 and 3
Figures 2 and 3
Figures 2 and 3
Figures 2 and 3
Figures 2 and 3
Figures 2 and 3
Figures 2 and 3
Figures 2 and 3
R
L
= 2kΩ, Figures 4 and 5
R
L
= 2kΩ, Figures 4 and 5
R
L
= 2kΩ, Figures 4 and 5
R
L
= 2kΩ, Figures 4 and 5
All channels switching
250
300
0.34
0.32
MIN
1.8
1.8
TYP
2.4
2.3
100
MAX
3.3
3.3
300
400
0.8
1.5
1.2
1.2
12
12
17
17
UNITS
ns
ns
ps
ps
ns
ns
ns
ns
ns
ns
ns
ns
MHz
_______________________________________________________________________________________
3
Quad LVDS Line Receivers with
Integrated Termination
MAX9125/MAX9126
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, CL = 10pF, differential input voltage
|
V
ID
|
= 0.2V to 1.0V, common-mode voltage V
CM
=
|
V
ID
/2
|
to 2.4V
-
|
V
ID
/2
|
, input rise and fall time = 1ns (20% to 80%), input frequency = 100MHz, T
A
= -40°C to +85°C. Typical values are at V
CC
=
+3.3V, V
CM
= 1.2V,
|
V
ID
|
= 0.2V, T
A
= +25°C, unless otherwise noted.) (Notes 3, 4)
Note 1:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, V
TL
, and V
ID
.
Note 2:
Short only one output at a time. Do not exceed the absolute maximum junction temperature specification.
Note 3:
AC parameters are guaranteed by design and characterization.
Note 4:
C
L
includes scope probe and test jig capacitance.
Note 5:
t
SKD1
is the magnitude difference of differential propagation delays in a channel; t
SKD1
=
|
t
PHLD
- t
PLHD
|
.
Note 6:
t
SKD2
is the magnitude difference of the t
PLHD
or t
PHLD
of one channel and the t
PLHD
or t
PHLD
of any other channel on the
same part.
Note 7:
t
SKD3
is the magnitude difference of any differential propagation delays between parts operating over rated conditions at
the same V
CC
and within 5°C of each other.
Note 8:
t
SKD4
is the magnitude difference of any differential propagation delays between parts operating over rated conditions.
Note 9:
f
MAX
generator output conditions: t
R
= t
F
< 1ns (0% to 100%), 50% duty cycle, V
OL
= 1.1V, V
OH
= 1.3V. Receiver output
criteria: 60% to 40% duty cycle, V
OL
= 0.4V (max), V
OH
= 2.7V (min), load = 10pF.
Typical Operating Characteristics
(V
CC
= +3.3V,
|
V
ID
|
= 200mV, V
CM
= +1.2V, C
L
= 10pF, frequency = 10MHz, T
A
= +25°C, unless otherwise noted.) (Figures 2 and 3)
SUPPLY CURRENT vs. SWITCHING
FREQUENCY, FOUR CHANNELS SWITCHING
MAX9125/6 toc01
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
DIFFERENTIAL PROPAGATION DELAY (ns)
MAX9125/6 toc02
DIFFERENTIAL PROPAGATION DELAY
vs. DIFFERENTIAL INPUT VOLTAGE
DIFFERENTIAL PROPAGATION DELAY (ns)
MAX9125/6 toc03
100
90
80
SUPPLY CURRENT (mA)
70
60
50
40
30
20
10
0
0.01
0.1
1
10
100
V
CC
= +3V
V
CC
= +3.3V
V
CC
= +3.6V
2.8
2.8
2.7
2.6
2.5
2.4
2.3
2.2
t
PHLD
t
PLHD
2.6
t
PHLD
2.4
2.2
t
PLHD
2.0
1000
-40
-15
10
35
60
85
SWITCHING FREQUENCY (MHz)
TEMPERATURE (°C)
100
500
900
1300
1700
2100
2500
DIFFERENTIAL INPUT VOLTAGE (mV)
4
_______________________________________________________________________________________
Quad LVDS Line Receivers with
Integrated Termination
Typical Operating Characteristics (continued)
(V
CC
= +3.3V,
|
V
ID
|
= 200mV, V
CM
= +1.2V, C
L
= 10pF, frequency = 10MHz, T
A
= +25°C, unless otherwise noted (Figures 2 and 3).)
MAX9125/MAX9126
DIFFERENTIAL PROPAGATION DELAY
vs. COMMON-MODE VOLTAGE
MAX9125/6 toc04
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9125/6 toc05
PULSE SKEW vs. SUPPLY VOLTAGE
MAX9125/6 toc06
2.6
DIFFERENTIAL PROPAGATION DELAY (ns)
2.6
DIFFERENTIAL PROPAGATION DELAY (ns)
200
175
150
SKEW (ps)
125
100
2.5
t
PHLD
2.4
2.5
t
PHLD
2.4
2.3
t
PLHD
2.2
0
0.5
1.0
1.5
2.0
2.5
COMMON-MODE VOLTAGE (V)
2.3
t
PLHD
2.2
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
75
50
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
PULSE SKEW vs. TEMPERATURE
MAX9125/6 toc07
TRANSITION TIME vs. CAPACITIVE LOAD
900
800
TRANSITION TIME (ps)
700
600
500
400
300
200
100
t
THL
t
TLH
MAX9125/6 toc08
200
175
150
SKEW (ps)
125
100
75
50
-40
-15
10
35
60
85
TEMPERATURE (°C)
1000
0
5
10
15
20
25
CAPACITIVE LOAD (pF)
Pin Description
PIN
1, 7, 9, 15
2, 6, 10, 14
3, 5, 11, 13
4, 12
8
16
NAME
IN_-
IN_+
OUT_
EN,
EN
GND
V
CC
Inverting Differential Receiver Inputs
Noninverting Differential Receiver Inputs
LVCMOS/LVTTL Receiver Outputs
Receiver Enable Inputs. When EN = low and
EN
= high, the outputs are disabled and in high
impedance. For other combinations of EN and
EN,
the outputs are active.
Ground
Power Supply Input. Bypass V
CC
to GND with 0.1µF and 0.001µF ceramic capacitors.
FUNCTION
_______________________________________________________________________________________
5
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