MIC59P60
8-Bit Serial-Input Protected Latched Driver
General Description
The MIC59P60 serial-input latched driver is a high-voltage
(80V), high-current (500mA) integrated circuit comprised of
eight CMOS data latches, a bipolar Darlington transistor
driver for each latch, and CMOS control circuitry for the
common CLEAR, STROBE, CLOCK, SERIAL DATA
INPUT, and OUTPUT ENABLE functions. Additional
protection circuitry supplied on this device includes thermal
shutdown, undervoltage lockout (UVLO), and overcurrent
shutdown.
The bipolar/CMOS combination provides an extremely
low-power latch with maximum interface flexibility. The
MIC59P60 has open-collector outputs capable of sinking
500mA, and integral diodes for inductive load transient
suppression with a minimum output breakdown voltage
rating of 80V (50V sustaining). The drivers can be
operated with a split supply, where the negative supply is
down to –20V and may be paralleled for higher load
current capability.
Using a 5V logic supply, the MIC59P60 will typically
operate at better than 5MHz. With a 12V logic supply,
significantly higher speeds can be obtained. The CMOS
inputs are compatible with standard CMOS, PMOS, and
NMOS circuits. TTL circuits may require pull-up resistors.
By using the serial data output, drivers may be cascaded
for interface applications requiring additional drive lines.
Each of the eight outputs has an independent overcurrent
shutdown of 500mA. Upon over-current shutdown, the
affected channel will turn OFF, and the flag will go low until
V
DD
is cycled or the ENABLE/RESET pin is pulsed high.
Current pulses less than 2μs will not activate current
shutdown.
Temperatures above 165°C will shut down the device and
activate the error flag. The UVLO circuit prevents
operation at low V
DD
; hysteresis of 0.5V is provided.
Datasheets and support documentation are available on
Micrel’s web site at:
www.micrel.com.
Features
•
•
•
•
•
•
•
•
•
•
•
3.3MHz minimum data input rate
Output current shutdown (500mA typical)
Undervoltage lockout
Thermal shutdown
Output fault flag
CMOS, PMOS, NMOS, and TTL compatible
Internal pull-up/pull-down resistors
Low-power CMOS logic and latches
High-voltage current sink outputs
Output transient-protection diodes
Single or split supply operation
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
August 4, 2015
Revision 2.0
Micrel, Inc.
MIC59P60
Ordering Information
Part Number
MIC59P60YN
MIC59P60YV
MICP60YWM
Junction Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package
20-Pin Plastic DIP
20-Pin PLCC
20-Pin Wide SOIC
Pb-Free
√
√
√
Pin Configuration
20-Pin PLCC (V)
(Top View)
20-Pin PDIP (N)
20-Pin Wide SOIC (WM)
(Top View)
Pin Description
Pin
Number
1
2, 10
3
4
5
6
7
8
9
Pin Name
CLEAR
VEE
CLOCK
SERIAL DATA IN
VSS
VDD
SERIAL DATA OUT
STROBE
OE / RESET
Pin Function
Sets All Latches OFF (open).
Output Ground (Substrate). Most negative voltage in the system connects here.
Serial Data Clock. A CLEAR must also be clocked into the latches.
Serial Data Input pin.
Logic reference (Ground) pin.
Logic Positive Supply voltage.
Serial Data Output pin. (Flow through).
Output Strobe pin. Loads output latches when High. A STROBE is needed to CLEAR latches.
When low, outputs are active. When high, device is inactive and reset from a fault condition.
An under voltage condition emulates a high OE/RESET input.
August 4, 2015
3
Revision 2.0
Micrel, Inc.
MIC59P60
Absolute Maximum Ratings
(1)
Output Voltage (V
CE
) .................................................... +80V
Output Voltage (V
CE(SUS)
)
(3)
........................................... +50V
Supply Voltage (V
DD
) with reference to V
SS
................. +15V
Supply Voltage (V
DD
) with reference to V
EE
................. +25V
Emitter Supply Voltage (V
EE
) ........................................ –20V
Input Voltage Range (V
IN
) ..................... –0.3V to V
DD
+0.3V
Protective Current
(4)
...................................................... 1.5A
Storage Temperature Range (T
S
) ............. –65°C to +150°C
ESD Rating
(5)(6)
.............................................. ESD Sensitive
Operating Ratings
(2)
Package Power Dissipation, P
D
Plastic DIP (N) ............................................................. 2.0W
Derate above T
A
= +25°C ..................................... 20mW/°C
PLCC (V) ..................................................................... 1.4W
Derate above T
A
= +25°C ..................................... 16mW/°C
Wide SOIC (WM) ........................................................ 1.2W
Derate above TA = +25°C ..................................... 12mW/°C
Operating Temperature Range (T
A
) ............ –40°C to +85°C
Electrical Characteristics
(7)
V
DD
= 5V, V
SS
= V
EE
= 0V; T
A
= +25°C, unless noted.
Symbol
I
CEX
Parameter
Output Leakage Current
Condition
V
OUT
= 80V
V
OUT
= 80V, T
A
= 70°C
I
OUT
= 100mA
V
CE(SAT)
Collector-Emitter Saturation Voltage
I
OUT
= 200mA
I
OUT
= 350mA
V
CE(SUS)
V
IN(0)
Input Voltage
V
DD
= 12V
V
DD
= 10V
V
DD
= 5V
(8)
V
DD
= 12V
R
IN
Input Resistance
V
DD
= 10V
V
DD
= 5V
I
OL
I
OH
Notes:
1. Exceeding the absolute maximum ratings may damage the device.
2. The device is not guaranteed to function outside its operating ratings.
3. For inductive load applications.
4. Each channel. VEE connection must be designed to minimize inductance and resistance.
5. Devices are input-static protected but can be damaged by extremely high static charges.
6. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF.
7. Specification for packaged product only
8. Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic "1".
Min.
Typ.
Max.
50
Units
µA
100
0.9
1.1
1.3
50
1.0
10.5
8.5
3.5
50
50
50
200
300
600
15
50
1.1
1.3
1.6
V
Collector-Emitter Sustaining Voltage
I
OUT
= 350mA, L = 2mH
V
V
V
IN(1)
V
kΩ
Flag Output Current
Flag Output Leakage
V
OL
= 0.4V
mA
nA
August 4, 2015
5
Revision 2.0
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