Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +1.65V to +5.5V, V
L
= +1.2V to (V
CC
+ 0.3V), GND = 0, I/O V
L_
and I/O V
CC_
unconnected, T
A
= T
MIN
to T
MAX
, unless other-
wise noted. Typical values are at V
CC
= +3.3V, V
L
= +1.8V, T
A
= +25°C.) (Notes 1, 2)
PARAMETER
POWER SUPPLIES
V
L
Supply Range
V
CC
Supply Range
Supply Current from V
CC
Supply Current from V
L
V
CC
Three-State Output Mode
Supply Current
V
L
Three-State Output Mode
Supply Current
Three-State Output Mode
Leakage Current
I/O V
L_
and I/O V
CC_
THREE-STATE
Pin Input Leakage
ESD PROTECTION
IEC 1000-4-2 Air-Gap Discharge
I/O V
CC
(Note 3)
IEC 1000-4-2 Contact Discharge
Human Body Model
LOGIC-LEVEL THRESHOLDS (MAX3372E/MAX3377E)
I/O V
L_
Input-Voltage High
I/O V
L_
Input-Voltage Low
V
IHL
V
ILL
V
L
- 0.2
0.15
V
V
±8
±8
±15
kV
V
L
V
CC
IQV
CC
IQV
L
I
THREE-STATE-VCC
I
THREE-STATE-VL
T
A
= +25°C,
THREE-STATE
= GND
T
A
= +25°C,
THREE-STATE
= GND
1.2
1.65
130
16
0.03
0.03
5.5
5.50
300
100
1
1
V
V
µA
µA
µA
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
I
THREE-STATE-LKG
T
A
= +25°C,
THREE-STATE
= GND
T
A
= +25°C
0.02
0.02
1
1
µA
µA
2
Maxim Integrated
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +1.65V to +5.5V, V
L
= +1.2V to (V
CC
+ 0.3V), GND = 0, I/O V
L_
and I/O V
CC_
unconnected, T
A
= T
MIN
to T
MAX
, unless other-
wise noted. Typical values are at V
CC
= +3.3V, V
L
= +1.8V, T
A
= +25°C.) (Notes 1, 2)
PARAMETER
I/O V
CC_
Input-Voltage High
I/O V
CC_
Input-Voltage Low
I/O V
L_
Output-Voltage High
I/O V
L_
Output-Voltage Low
I/O V
CC_
Output-Voltage High
I/O V
CC_
Output-Voltage Low
THREE-STATE
Input-Voltage
High
THREE-STATE
Input-Voltage
Low
I/O V
L_
Input-Voltage High
I/O V
L_
Input-Voltage Low
I/O V
CC_
Input-Voltage High
I/O V
CC_
Input-Voltage Low
I/O V
L_
Output-Voltage High
I/O V
L_
Output-Voltage Low
I/O V
CC_
Output-Voltage High
I/O V
CC_
Output-Voltage Low
THREE-STATE
Input-Voltage
High
THREE-STATE
Input-Voltage
Low
SYMBOL
V
IHC
V
ILC
V
OHL
V
OLL
V
OHC
V
OLC
V
IL-THREE-STATE
V
IL-THREE-STATE
I/O V
L_
source current = 20µA,
I/O V
CC_
> V
CC
- 0.4V
I/O V
L_
sink current = 20µA,
I/O V
CC_
< 0.15V
I/O V
CC_
source current = 20µA,
I/O V
L _
> V
L
- 0.2V
I/O V
CC_
sink current = 20µA,
I/O V
L_
< 0.15V
V
L
- 0.2
0.15
0.67
✕
V
CC
0.4
0.67
✕
V
L
0.4
CONDITIONS
MIN
TYP
MAX
0.15
UNITS
V
V
V
V
V
V
V
V
V
CC
- 0.4
LOGIC-LEVEL THRESHOLDS (MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E)
V
IHL
V
ILL
V
IHC
V
ILC
V
OHL
V
OLL
V
OHC
V
OLC
V
IH-THREE-STATE
V
IL-THREE-STATE
I/O V
L_
source current = 20µA,
I/O V
CC_
≥
V
CC
- 0.4V
I/O V
L_
sink current = 1mA,
I/O V
CC_
≤
0.15V
I/O V
CC_
source current = 20µA,
I/O V
L_
≥
V
L
- 0.2V
I/O V
CC_
sink current = 1mA,
I/O V
L_
≤
0.15V
V
L
- 0.2
0.15
0.67
✕
V
CC
0.4
0.67
✕
V
L
0.4
V
CC
- 0.4
0.15
V
L
- 0.2
0.15
V
V
V
V
V
V
V
V
V
V
Maxim Integrated
3
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
TIMING CHARACTERISTICS
(V
CC
= +1.65V to +5.5V, V
L
= +1.2V to (V
CC
+ 0.3V), GND = 0, R
LOAD
= 1MΩ, I/O test signal of Figure 1, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.3V, V
L
= +1.8V, T
A
= +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
I/O V
CC
_ Rise Time (Note 4)
I/O V
CC
_ Fall Time (Note 5)
I/O V
L
_ Rise Time (Note 4)
I/O V
L
_ Fall Time (Note 5)
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
SYMBOL
t
RVCC
t
FVCC
t
RVL
t
FVL
I/O
VL-VCC
I/O
VCC-VL
t
SKEW
Driving I/O V
L
_
Driving I/O V
CC
_
Each translator equally loaded
C
L
= 25pF
230
CONDITIONS
MIN
TYP
1100
1000
600
1100
1.6
1.6
500
MAX
UNITS
ns
ns
ns
ns
µs
ns
kbps
MAX3372E/MAX3377E (C
LOAD
= 50pF)
MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E (C
LOAD
= 15pF, Driver Output Impedance
≤
50
Ω)
+1.2V
≤
V
L
≤
V
CC
≤
+5.5V
I/O V
CC
_ Rise Time (Note 4)
I/O V
CC
_ Fall Time (Note 5)
I/O V
L
_ Rise Time (Note 4)
I/O V
L
_ Fall Time (Note 5)
t
RVCC
t
FVCC
t
RVL
t
LFV
I/O
VL-VCC
Propagation Delay
I/O
VCC-VL
Channel-to-Channel Skew
Maximum Data Rate
t
SKEW
Driving I/O V
CC
_
Each translator
equally loaded
Open-drain driving
7
Open-drain driving
Open-drain driving
Open-drain driving
Open-drain driving
Driving I/O V
L
_
Open-drain driving
Open-drain driving
Open-drain driving
8
500
170
6
20
8
180
3
30
5
210
4
190
25
400
37
50
30
400
30
60
30
1000
30
1000
20
50
ns
Mbps
kbps
ns
ns
ns
ns
ns
4
Maxim Integrated
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
TIMING CHARACTERISTICS (continued)
(V
CC
= +1.65V to +5.5V, V
L
= +1.2V to (V
CC
+ 0.3V), GND = 0, R
LOAD
= 1MΩ, I/O test signal of Figure 1, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.3V, V
L
= +1.8V, T
A
= +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
+1.2V
≤
V
L
≤
V
CC
≤
+3.3V
I/O V
CC
_ Rise Time (Note 4)
I/O V
CC
_ Fall Time (Note 5)
I/O V
L
_ Rise Time (Note 4)
I/O V
L
_ Fall Time (Note 5)
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
+2.5V
≤
V
L
≤
V
CC
≤
+3.3V
I/O V
CC
_ Rise Time (Note 4)
I/O V
CC
_ Fall Time (Note 5)
I/O V
L
_ Rise Time (Note 4)
I/O V
L
_ Fall Time (Note 5)
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
+1.8V
≤
V
L
≤
V
CC
≤
+2.5V
I/O V
CC
_ Rise Time (Note 4)
I/O V
CC
_ Fall Time (Note 5)
I/O V
L
_ Rise Time (Note 4)
I/O V
L
_ Fall Time (Note 5)
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
t
RVCC
t
FVCC
t
RVL
t
FVL
I/O
VL-VCC
I/O
VCC-VL
t
SKEW
Driving I/O V
L
_
Driving I/O V
CC
_
Each translator equally loaded
16
15
15
15
15
15
15
10
ns
ns
ns
ns
ns
ns
Mbps
t
RVCC
t
FVCC
t
RVL
t
FVL
I/O
VL-VCC
I/O
VCC-VL
t
SKEW
Driving I/O V
L
_
Driving I/O V
CC
_
Each translator equally loaded
16
15
15
15
15
15
15
10
ns
ns
ns
ns
ns
ns
Mbps
t
RVCC
t
FVCC
t
RVL
t
FVL
I/O
VL-VCC
I/O
VCC-VL
t
SKEW
Driving I/O V
L
_
Driving I/O V
CC
_
Each translator equally loaded
10
25
30
30
30
20
20
10
ns
ns
ns
ns
ns
ns
Mbps
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Note 1:
All units are 100% production tested at T
A
= +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 2:
For normal operation, ensure V
L
< (V
CC
+ 0.3V). During power-up, V
L
> (V
CC
+ 0.3V) will not damage the device.
Note 3:
To ensure maximum ESD protection, place a 1µF capacitor between V
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stm32/stm8
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