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MAX5852ETL+T

Description
digital to analog converters - dac 8-bit 2ch 165msps dac
CategoryAnalog mixed-signal IC    converter   
File Size1MB,18 Pages
ManufacturerMaxim
Websitehttps://www.maximintegrated.com/en.html
Environmental Compliance
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MAX5852ETL+T Overview

digital to analog converters - dac 8-bit 2ch 165msps dac

MAX5852ETL+T Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMaxim
Parts packaging codeQFN
package instructionHVQCCN,
Contacts40
Reach Compliance Codecompli
Factory Lead Time12 weeks
Maximum analog output voltage1.25 V
Minimum analog output voltage-1 V
Converter typeD/A CONVERTER
Enter bit codeCOMPLEMENTARY BINARY
Input formatPARALLEL, 8 BITS
JESD-30 codeS-XQCC-N40
JESD-609 codee3
length6 mm
Maximum linear error (EL)0.0977%
Humidity sensitivity level1
Number of digits8
Number of functions2
Number of terminals40
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height0.8 mm
Nominal settling time (tstl)0.012 µs
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width6 mm
19-3232; Rev 0; 4/04
KIT
ATION
EVALU
E
BL
AVAILA
Dual, 8-Bit, 165Msps, Current-Output DAC
General Description
The MAX5852 dual, 8-bit, 165Msps digital-to-analog
converter (DAC) provides superior dynamic performance
in wideband communication systems. The device inte-
grates two 8-bit DAC cores, and a 1.24V reference. The
MAX5852 supports single-ended and differential modes
of operation. The dynamic performance is maintained
over the entire 2.7V to 3.6V power-supply operating
range. The analog outputs support a -1.0V to +1.25V
compliance voltage.
The MAX5852 can operate in interleaved data mode to
reduce the I/O pin count. This allows the converter to
be updated on a single, 8-bit bus.
The MAX5852 features digital control of channel gain
matching to within ±0.4dB in sixteen 0.05dB steps.
Channel matching improves sideband suppression in
analog quadrature modulation applications. The on-
chip 1.24V bandgap reference includes a control
amplifier that allows external full-scale adjustments of
both channels through a single resistor. The internal ref-
erence can be disabled and an external reference may
be applied for high-accuracy applications.
The MAX5852 features full-scale current outputs of 2mA
to 20mA and operates from a 2.7V to 3.6V single sup-
ply. The DAC supports three modes of power-control
operation: normal, low-power standby, and complete
power-down. In power-down mode, the operating
current is reduced to 1µA.
The MAX5852 is packaged in a 40-pin thin QFN with
exposed paddle (EP) and is specified for the extended
(-40°C to +85°C) temperature range.
Pin-compatible, lower speed, and higher resolution ver-
sions are also available. Refer to the MAX5853 (10 bit,
80Msps), the MAX5851 (8 bit, 80Msps), and the
MAX5854 (10 bit, 165Msps) data sheets for more infor-
mation. See Table 4.
8-Bit, 165Msps Dual DAC
Low Power
190mW with I
FS
= 20mA at f
CLK
= 165MHz
2.7V to 3.6V Single Supply
Full Output Swing and Dynamic Performance at
2.7V Supply
Superior Dynamic Performance
67dBc SFDR at f
OUT
= 40MHz
Programmable Channel Gain Matching
Integrated 1.24V Low-Noise Bandgap Reference
Single-Resistor Gain Control
Interleaved Data Mode
Single-Ended and Differential Clock Input Modes
Miniature 40-Pin Thin QFN Package, 6mm x 6mm
EV Kit Available—MAX5852 EV Kit
Features
MAX5852
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
40 Thin QFN-EP*
MAX5852ETL
-40°C to +85°C
*EP
= Exposed paddle.
Pin Configuration
OUTNA
OUTNB
OUTPA
OUTPB
TOP VIEW
AGND
AV
DD
AGND
AV
DD
40 39 38 37 36 35 34 33 32 31
REFO
30
CV
DD
29
CGND
28
CLK
27
CV
DD
26
CLKXN
25
CLKXP
24
DCE
23
CW
22
N.C.
21
N.C.
DA7/PD
DA6/DACEN
DA5/IDE
DA4/REN
DA3/G3
DA2/G2
DA1/G1
DA0/G0
N.C.
N.C.
1
2
3
4
5
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20
EP
Applications
Communications
VSAT, LMDS, MMDS, WLAN,
Point-to-Point Microwave Links
Wireless Base Stations
Quadrature Modulation
Direct Digital Synthesis (DDS)
Instrumentation/ATE
MAX5852
DB7
DB5
DB4
DV
DD
DB3
DGND
DB2
DB1
REFR
DB6
THIN QFN
________________________________________________________________
Maxim Integrated Products
DB0
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

MAX5852ETL+T Related Products

MAX5852ETL+T MAX5852ETL+
Description digital to analog converters - dac 8-bit 2ch 165msps dac digital to analog converters - dac 8-bit 2ch 165msps dac
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Maxim Maxim
Parts packaging code QFN QFN
package instruction HVQCCN, HVQCCN,
Contacts 40 40
Reach Compliance Code compli compli
Factory Lead Time 12 weeks 6 weeks
Maximum analog output voltage 1.25 V 1.25 V
Minimum analog output voltage -1 V -1 V
Converter type D/A CONVERTER D/A CONVERTER
Enter bit code COMPLEMENTARY BINARY COMPLEMENTARY BINARY
Input format PARALLEL, 8 BITS PARALLEL, 8 BITS
JESD-30 code S-XQCC-N40 S-XQCC-N40
JESD-609 code e3 e3
length 6 mm 6 mm
Maximum linear error (EL) 0.0977% 0.0977%
Humidity sensitivity level 1 1
Number of digits 8 8
Number of functions 2 2
Number of terminals 40 40
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Package body material UNSPECIFIED UNSPECIFIED
encapsulated code HVQCCN HVQCCN
Package shape SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260
Certification status Not Qualified Not Qualified
Maximum seat height 0.8 mm 0.8 mm
Nominal settling time (tstl) 0.012 µs 0.012 µs
Nominal supply voltage 3 V 3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface MATTE TIN Matte Tin (Sn)
Terminal form NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 30 NOT SPECIFIED
width 6 mm 6 mm
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