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74HCT112D,652

Description
flip flops dual JK F/F neg-edge
Categorylogic    logic   
File Size92KB,16 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric Compare View All

74HCT112D,652 Overview

flip flops dual JK F/F neg-edge

74HCT112D,652 Parametric

Parameter NameAttribute value
Brand NameNXP Semiconduc
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSOP
package instructionPLASTIC, SOT-109-1, SO-16
Contacts16
Manufacturer packaging codeSOT109-1
Reach Compliance Codecompli
seriesHCT
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length9.9 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Maximum Frequency@Nom-Su20000000 Hz
MaximumI(ol)0.004 A
Humidity sensitivity level1
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply5 V
propagation delay (tpd)60 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Trigger typeNEGATIVE EDGE
width3.9 mm
minfmax20 MHz
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT112
Dual JK flip-flop with set and reset;
negative-edge trigger
Product specification
Supersedes data of December 1990
File under Integrated Circuits, IC06
1998 Jun 10

74HCT112D,652 Related Products

74HCT112D,652 74HCT112DB,118 74HC112PW,118
Description flip flops dual JK F/F neg-edge flip flops dual J-K neg edge flip flops dual J-K neg edge
Brand Name NXP Semiconduc NXP Semiconduc NXP Semiconduc
Is it Rohs certified? conform to conform to conform to
Maker NXP NXP NXP
Parts packaging code SOP SSOP1 TSSOP
package instruction PLASTIC, SOT-109-1, SO-16 SSOP, PLASTIC, SOT-403-1, TSSOP-16
Contacts 16 16 16
Manufacturer packaging code SOT109-1 SOT338-1 SOT403-1
Reach Compliance Code compli unknow unknow
series HCT HCT HC/UH
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
JESD-609 code e4 e4 e4
length 9.9 mm 6.2 mm 5 mm
Load capacitance (CL) 50 pF 50 pF 50 pF
Logic integrated circuit type J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP
Humidity sensitivity level 1 1 1
Number of digits 2 2 2
Number of functions 2 2 2
Number of terminals 16 16 16
Maximum operating temperature 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260 260 260
propagation delay (tpd) 60 ns 60 ns 265 ns
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 2 mm 1.1 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 6 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V 4.5 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30
Trigger type NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE
width 3.9 mm 5.3 mm 4.4 mm
minfmax 20 MHz 20 MHz 24 MHz
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