7132LA30L52B datasheet, PDF - EEWORLD Datasheet

7132LA30L52B: DescriptionMulti-Port SRAM, 2KX8, 30ns, CMOS, CQCC52; Categorystorage storage; File Size1MB，14 Pages; ManufacturerIDT (Integrated Device Technology)

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7132LA30L52B Overview

Multi-Port SRAM, 2KX8, 30ns, CMOS, CQCC52

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Objectid	1167347005
Reach Compliance Code	not_compliant
ECCN code	3A001.A.2.C
Maximum access time	30 ns
I/O type	COMMON
JESD-30 code	S-XQCC-N52
JESD-609 code	e0
memory density	16384 bit
Memory IC Type	MULTI-PORT SRAM
memory width	8
Number of ports	2
Number of terminals	52
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2KX8
Output characteristics	3-STATE
Package body material	CERAMIC
encapsulated code	QCCN
Encapsulate equivalent code	LCC52,.75SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum standby current	0.004 A
Minimum standby current	2 V
Maximum slew rate	0.235 mA
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD

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