74LVC1G58
Low-power configurable multiple function gate
Rev. 01 — 15 September 2004
Product data sheet
1. General description
The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
off
. The I
off
circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC1G58 provides configurable multiple functions. The output state is determined
by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,
NOR, XOR, inverter and buffer. All inputs can be connected to V
CC
or GND.
The three inputs (A, B and C) are capable of transforming slowly changing input signals
into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The
difference between the positive voltage V
T+
and the negative voltage V
T−
is defined as the
hysteresis voltage V
H
.
2. Features
s
s
s
s
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
x
JESD8-7 (1.65 V to 1.95 V)
x
JESD8-5 (2.3 V to 2.7 V)
x
JESD8B/JESD36 (2.7 V to 3.6 V).
±24
mA output drive (V
CC
= 3.0 V)
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V.
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C.
s
s
s
s
s
s
s
s
Philips Semiconductors
74LVC1G58
Low-power configurable multiple function gate
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns.
Symbol
Parameter
Conditions
V
CC
= 1.8 V; C
L
= 30 pF;
R
L
= 1 kΩ
V
CC
= 2.5 V; C
L
= 30 pF;
R
L
= 500
Ω
V
CC
= 2.7 V; C
L
= 50 pF;
R
L
= 500
Ω
V
CC
= 3.3 V; C
L
= 50 pF;
R
L
= 500
Ω
V
CC
= 5.0 V; C
L
= 50 pF;
R
L
= 500
Ω
C
I
C
PD
[1]
Min
-
-
-
-
-
-
Typ
6
3.5
4.2
3.8
3.0
2.5
20
Max
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
pF
pF
t
PHL
, t
PLH
propagation delay
input A, B and
C to output Y
input capacitance
power dissipation
capacitance per buffer
V
CC
= 3.3 V
[1] [2]
-
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
[2]
The condition is V
I
= GND to V
CC
.
4. Ordering information
Table 2:
Ordering information
Package
Temperature range
74LVC1G58GW
74LVC1G58GV
74LVC1G58GM
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
SC-88
SC-74
XSON6
Description
plastic surface mounted package; 6 leads
plastic surface mounted package; 6 leads
plastic extremely thin small outline package; no
leads; 6 terminals; body 1
×
1.45
×
0.5 mm
Version
SOT363
SOT457
SOT886
Type number
5. Marking
Table 3:
Marking
Marking code
YK
V58
YK
Type number
74LVC1G58GW
74LVC1G58GV
74LVC1G58GM
9397 750 13852
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 15 September 2004
2 of 18
Philips Semiconductors
74LVC1G58
Low-power configurable multiple function gate
6. Functional diagram
3
4
B
1
Y
A
C
6
001aab687
Fig 1. Logic symbol.
7. Pinning information
7.1 Pinning
58
B
1
6
C
B
GND
1
2
6
C
V
CC
Y
58
5
GND
2
5
V
CC
A
3
001aab686
4
A
3
4
001aab731
Y
Transparent top view
Fig 2. Pin configuration SC-88 and SC-74.
Fig 3. Pin configuration XSON6.
7.2 Pin description
Table 4:
Symbol
B
GND
A
Y
V
CC
C
Pin description
Pin
1
2
3
4
5
6
Description
data input B
ground (0 V)
data input A
data output Y
supply voltage
data input C
9397 750 13852
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 15 September 2004
3 of 18
Philips Semiconductors
74LVC1G58
Low-power configurable multiple function gate
8. Functional description
8.1 Function table
Table 5:
Inputs
C
L
L
L
L
H
H
H
H
[1]
Function table
B
L
L
H
H
L
L
H
H
[1]
Output
A
L
H
L
H
L
H
L
H
Y
L
H
L
H
H
H
L
L
H = HIGH voltage level;
L = LOW voltage level.
8.2 Logic configurations
Table 6:
Function selection table
Figure
see
Figure 4
see
Figure 7
see
Figure 5
and
6
see
Figure 5
and
6
see
Figure 7
see
Figure 4
see
Figure 8
see
Figure 9
see
Figure 10
Logic function
2-input NAND
2-input NAND with both inputs inverted
2-input AND with inverted input
2-input NOR with inverted input
2-input OR
2-input OR with both inputs inverted
2-input XOR
Buffer
Inverter
V
CC
B
C
Y
B
1
2
B
C
Y
3
6
5
4
Y
B
C
Y
C
B
C
Y
B
1
2
3
6
5
4
Y
C
V
CC
001aab688
001aab689
Fig 4. 2-input NAND gate or 2-input OR
with both inputs inverted.
Fig 5. 2-input AND gate with inverted B
input or 2-input NOR gate with
inverted C input.
9397 750 13852
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 15 September 2004
4 of 18
Philips Semiconductors
74LVC1G58
Low-power configurable multiple function gate
V
CC
V
CC
A
C
Y
A
C
1
2
A
C
Y
A
3
6
5
4
Y
C
A
C
Y
A
Y
1
2
3
6
5
4
Y
C
001aab691
001aab690
Fig 6. 2-input AND gate with inverted C
input or 2-input NOR gate with
inverted A input.
Fig 7. 2-input OR gate or 2-input NAND
gate with both inputs inverted.
V
CC
V
CC
B
B
C
Y
1
2
3
6
5
4
Y
C
1
A
Y
A
001aab692
001aab693
6
5
4
Y
2
3
Fig 8. 2-input XOR gate.
Fig 9. Buffer.
V
CC
B
B
Y
1
2
3
6
5
4
Y
001aab694
Fig 10. Inverter.
9. Limiting values
Table 7:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
Parameter
supply voltage
input diode current
input voltage
output diode current
output voltage
output source or sink
current
V
O
> V
CC
or V
O
< 0 V
active mode
Power-down mode
V
O
= 0 V to V
CC
[1] [2]
[1] [2]
Conditions
V
I
< 0 V
[1]
Min
−0.5
-
−0.5
-
−0.5
−0.5
-
Max
+6.5
−50
+6.5
±50
+6.5
+6.5
±50
Unit
V
mA
V
mA
V
V
mA
9397 750 13852
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 15 September 2004
5 of 18
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