CMOS IC
LC590208A/12A/16A
16-Bit Single Chip Microcontroller
Under Development
●
●
Dot matrix LCD driver
Low-voltage operation
Overview
The Sanyo LC590200 series comprises single-chip microcomputer models whose major features
include built-in dot matrix LCD driver, low-voltage operation, and low current dissipation.
Their powerful architecture is characterized by an instruction set in which all instructions are a
multiple of 2 bytes long, 16-bit general-purpose registers, and the capability to allow 2 bytes of
RAM locations to be accessed at the same time.
Features
■
ROM size (program)
・
8,192×8 bits (LC590208A, table data also stored in this ROM space)
・
12,288×8 bits (LC590212A, table data also stored in this ROM space)
・
16,384×8 bits (LC590216A, table data also stored in this ROM space)
■
RAM size
・
576×8 bits
Data:
512×8 bits (including the stack area)
Display: 64×8 bits
・
64 segments×8 common lines (1/4 bias)
■
LCD display
■
Minimum instruction execution time
・
With
・
With
・
With
・
With
■
Power voltage
・
With 32.768 kHz crystal oscillation:
・
With RC oscillation:
・
With 2.0 MHz ceramic resonator oscillation:
2.0V to 4.5V
(Ta=-30 to 70℃ )
1.8V to 4.5V
(Ta= 0 to 60℃ )
2.2V to 4.5V
(Ta=-30 to 70℃ )
32.768 kHz crystal oscillator:
RC oscillation (64 kHz Typ.):
RC oscillation (1.5 MHz Typ.):
2.0 MHz ceramic resonator oscillation:
31μ s (min.)
16μ s (Typ.)
0.67μ s (Typ.)
0.50μ s
Ver 4.06
LC590208/12A/16A
■
Consumption current
(at 3.0V)
・
6.9μ A (Typ.) (T = 25℃ , 32.768 kHz crystal oscillation,
LCD on, HALT mode)
・
100μ A (Typ.) (T = 25℃ , 32kHz crystal oscillation,
1 MHz CF oscillation, LCD on, HALT
mode)
・
260μ A (Typ.) (T = 25℃ , 32kHz crystal oscillation,
1 MHz CF oscillation, LCD on, continuous
operation mode)
■
Ports
・
8-bit I/O port:
1 (P00-P07)
* Pin P07 is also used as the alarm output pin.
* Pins P00-P07 are also used as external interrupt
pins.
・
4-bit I/O port:
1 (P10-P13)
* Pins P10-P13 are also used as serial interface pins.
* Pin 13 is also used as an external interrupt input
pin.
・
LCD display port
64 (Segments 0 - 63)
○
Segment outputs:
8 (COM0 - COM7)
○
Common outputs:
4 (VLCD1 - VLCD4)
○
Bias power pins:
○
LCD bias reference voltage pin: 1 (Vref)
○
LCD bias power step-up capacitor pins: 2 (CUP1, CUP2)
・
Oscillator pins:
・
Reset pin:
・
Power supply pins:
■
Timers
・
Timer 0:
Runs on the system clock that is obtained by dividing the frequency of
the clock from the oscillator by a factor of 1/1 to 1/128 according to the
control register settings. When the timer 0 count coincides with the 16-bit
value in the T0LR and T0HR registers, the timer performs interrupt or
other processing according to the control register settings.
Runs on the system clock that is obtained by dividing the frequency of the
clock from the oscillator by a factor of 1/1 to 1/128 according to the
control register settings. When the timer 1 count coincides with the 16-bit
value in the T1LR and T1HR registers, the timer performs interrupt or
other processing according to the control register settings.
Runs on the system clock that is obtained by dividing the frequency of the
clock from the oscillator by a factor of 1/32 to 1/256 according to the
control register settings or on the source clock from the OSC0 oscillator
and generates interrupts at a the interval that is an integral multiple of 2
to 16384 (as specified by the control register).
Runs on the base clock that is generated by the base timer. It is cleared by
writing data into the related control register.
* The base timer must be active whenever the watchdog timer is to be
activated.
4 (XTO, XTI, CFO, CFI)
1 (RES)
3 (VDD, VSS, LVOL)
・
Timer 1:
・
Base timer:
Watchdog timer:
Ver 4.06
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LC590208/12A/16A
■
Serial interfaces
The LC590200 series microcomputers have two serial interfaces named SIO0 and SIO1.
・
Mode 0: 8-bit synchronous serial interface
(1) 2-wire serial communication, the internal clock frequency is from
4 to 512
Tcy c.
(2) The clock source is selectable from the internal clock, external clock, and
software clock.
(3) The MSB- or LSB-first mode is selectable.
・
Mode 1: Asynchronous serial interface (UART)
(1) Half-duplex, 1 start bit, 8 data bits, 1 parity bit, 2 stop bits, 16 to 2048 Tcyc
baudrates.
* The baudrate can be set to 9,600 bps when the 32.768 kHz OSC0 is used.
(2) The MSB- or LSB-first mode is selectable.
■
Interrupts: 8 sources, 8 vectors
・
The LC590200 series allow the user to set the priority level of interrupts by manipulating
a register (3 levels).
・
Any interrupt requests of a level that is equal to or lower than that of the interrupt that is
currently being processed are not accepted.
・
When interrupts to two or more interrupt vector addresses occur at the same time, the
interrupt with a higher level takes precedence. Of interrupts of the same level, the one
with the lowest vector address takes precedence.
No.
1
2
3
4
5
6
7
8
Vector Address
008000H
008004H
008008H
00800CH
008010H
008014H
008018H
00801CH
Interrupt Source
Watchdog timer interrupt
Base timer interrupt
Timer 0 interrupt
Timer 1 interrupt
Serial interface SIO0 interrupt
Serial interface SIO1 interrupt
Interrupt from port PO
External interrupt (pin P13)
■
Subroutine stack level:
■
Oscillation circuits
・
OSC1 (CFI/CFO):
128 levels maximum (The stack is allocated in RAM.)
For system clock - ceramic oscillation, external CGD and CDC or
RC oscillation (external RCR2− * RC oscillation is available for
chip form only.)
For low-speed system clock and base timer count
32 kHz crystal oscillator RCRT, external COX and CDXl
or RC oscillation (external RCR1− * RC oscillation is available
for chip form only.)
・
OSC0 (XTI/XTO):
・
Internal oscillatoin circuit: Internal RC
* The start/stop control of each oscillator is accomplished through the control register.
Initially, the external oscillation is disabled and the internal RC oscillation enabled.
Ver 4.06
3
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LC590208/12A/16A
■
Standby Function
・
HALT mode:
The microcomputer stops executing instructions; the peripheral
circuits continue operation.
The HALT mode is reset by the following factors:
○
Port 0, Port 13 interrupt
○
Timer 0/1 or base timer interrupt
○
Serial interface interrupt
・
Clock HOLD mode:
The microcomputer stops executing instructions. All clocks except
OSC0 are stopped. The system clock is stopped.
The base timer and other circuits that make use of OSC0 remain
active.
The clock HOLD mode is reset by the following factors:
○
Port 0, port 13 interrupt
○
Base timer interrupt
○
Reset
・
HOLD mode:
The microcomputer stops executing instructions. The peripheral
circuit (oscillator circuit) stops operation.
The HOLD mode is reset by the following factors:
○
Port 0 interrupt
○
Port 13 interrupt
○
Reset
●
Packaging
○
Chip form
○
SQFP100
●
Development tools
○
Emulator: EVA590000
Ver 4.06
4
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LC590208/12A/16A
■
Pad layout
Chip size:
Pad size:
Pad opening:
Chip thickness:
3.50 mm
×
3.50 mm
94μ m
×
94μ m
80μ m
×
80μ m
330μ m (chip form)
50
45
40
35
30
26
25
51
55
20
60
（
0,0
）
Y
15
65
X
10
70
5
75
Model name
1
76
80
85
90
95
100
Ver 4.06
5
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Embedded System
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