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bq24230H, bq24232H
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
bq2423xx USB-Friendly Lithium-Ion Battery Charger and Power-Path Management IC
1 Features
1
•
•
•
•
•
•
•
•
•
•
•
•
•
Fully Compliant USB Charger
– Selectable 100-mA and 500-mA Maximum
Input Current
– 100-mA Maximum Current Limit Ensures
Compliance to USB-IF Standard
– Input-based Dynamic Power Management
(V
IN
– DPM) for Protection Against Poor USB
Sources
28-V Input Rating With Overvoltage Protection
4.35-V Battery Regulation
Integrated Dynamic Power-Path Management
(DPPM) Function Simultaneously and
Independently Powers the System and Charges
the Battery
Supports up to 500-mA Charge Current With
Current Monitoring Output (ISET)
Programmable Input Current Limit up to 500 mA
for Wall Adapters
Programmable Termination Current (bq24232H)
Programmable Precharge and Fast-Charge Safety
Timers
Reverse Current, Short-Circuit, and Thermal
Protection
NTC Thermistor Input
Proprietary Start-up Sequence Limits Inrush
Current
Status Indication – Charging/Done, Power Good
Small 3-mm × 3-mm 16-Lead QFN Package
The bq2423xH features dynamic power-path
management (DPPM) that powers the system while
simultaneously and independently charging the
battery. The DPPM circuit reduces the charge current
when the input current limit causes the system output
to fall to the DPPM threshold, thus supplying the
system load at all times while monitoring the charge
current separately. This feature reduces the number
of charge and discharge cycles on the battery, allows
for proper charge termination, and enables the
system to run with a defective or absent battery pack.
Additionally, this feature enables instant system turn-
on even with a totally discharged battery. The power-
path management architecture also lets the battery
supplement the system current requirements when
the adapter cannot deliver the peak system currents,
thus enabling the use of a smaller adapter.
The battery is charged in three phases: conditioning,
constant current, and constant voltage. In all charge
phases, an internal control loop monitors the IC
junction temperature and reduces the charge current
if the internal temperature threshold is exceeded.
The charger power stage and charge current sense
functions are fully integrated. The charger function
has high-accuracy current and voltage regulation
loops, charge status display, and charge termination.
The input current limit and charge current are
programmable using external resistors.
Device Information
(1)
PART NUMBER
bq2423xx
PACKAGE
VQFN (16)
BODY SIZE (NOM)
3.00 mm x 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
2 Applications
•
•
Bluetooth
Devices
Low-Power Handheld Devices
®
Typical Application Circuit
1k
1k
3 Description
The bq2423xH series of devices are highly integrated
Li-ion linear chargers and system power-path
management devices targeted at space-limited
portable applications. The devices operate from either
a USB port or AC adapter and support charge
currents from 25 mA to 500 mA. The high-input
voltage range with input overvoltage protection
supports low-cost, unregulated adapters. The USB
input current limit accuracy and start-up sequence
allow the bq2423xH to meet USB-IF inrush current
specifications. Additionally, the input dynamic power
management (V
IN
-DPM) prevents the charger from
crashing poorly designed or incorrectly configured
USB sources.
1
7
PGOOD
CHG
9
SYSTEM
OUT
10
11
Adaptor
DC
13
IN
1mF
GND
8
4.7mF
VSS
EN2
5
2
3
bq24232H
BAT
15
TD
TMR
ISET
EN1
ILIM
CE
4.7mF
PACK+
TS
1
TEMP
14
12
16
4
6
2.94 k
4.32 k
PACK-
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq24230H, bq24232H
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions
.........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
1
1
1
2
3
3
4
4
4
5
5
5
9
9.1 Application Information............................................
25
9.2 Typical Application ..................................................
25
9.3 System Examples ...................................................
30
10 Power Supply Recommendations
.....................
31
10.1 Requirements for OUT Output ..............................
31
10.2 USB Sources and Standard AC Adapters ............
31
10.3 Half-Wave Adapters ..............................................
31
11 Layout...................................................................
31
11.1 Layout Guidelines .................................................
31
11.2 Layout Example ....................................................
32
11.3 Thermal Package ..................................................
33
12 Device and Documentation Support
.................
34
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
34
34
34
34
34
8
Detailed Description
............................................
11
8.1
8.2
8.3
8.4
11
12
13
23
9
Application and Implementation
........................
25
13 Mechanical, Packaging, and Orderable
Information
...........................................................
34
4 Revision History
Changes from Revision A (November 2014) to Revision B
•
Page
Changed from "Table 2" to "Table 1" in the Pin Functions Description column for EN1/EN2 ..............................................
3
Changes from Original (January 2014) to Revision A
•
Page
Added
ESD Ratings
table,
Feature Description
section,
Device Functional Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device and Documentation Support
section, and
Mechanical, Packaging, and Orderable Information
section ..................................................................................................
1
2
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Copyright © 2014–2017, Texas Instruments Incorporated
Product Folder Links:
bq24230H bq24232H
bq24230H, bq24232H
www.ti.com
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
5 Device Comparison Table
PART NUMBER
(1)
(2)
V
OVP
6.6 V
6.6 V
10.5 V
10.5 V
V
OUT(REG)
4.5 V
4.5 V
4.5 V
4.5 V
V
DPM
V
O(REG)
– 100 mV
V
O(REG)
– 100 mV
V
O(REG)
– 100 mV
V
O(REG)
– 100 mV
OPTIONAL
FUNCTION
TD
TD
ITERM
ITERM
MARKING
24230H
24230H
24232H
24232H
bq24230HRGTR
(3)
bq24230HRGTT
(3)
bq24232HRGTR
bq24232HRGTT
(1)
(2)
(3)
The RGT package is available in the following options:
R - taped and reeled in quantities of 3000 devices per reel.
T - taped and reeled in quantities of 250 devices per reel.
This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including
bromine (Br) or antimony (Sb) above 0.1% of total product weight.
Product Preview
6 Pin Configuration and Functions
RGT Package
16 Pins
Top View
TS
BAT
BAT
CE
16 15 14 13
1
12
2
3
4
5
6
7
8
bq24230H
11
10
9
ILIM
OUT
OUT
CHG
TS
BAT
BAT
CE
16 15 14 13
1
12
2
3
4
5
6
7
8
bq24232H
11
10
9
ISET
ITERM
TMR
IN
ISET
TD
TMR
IN
ILIM
OUT
OUT
CHG
EN2
EN1
PGOOD
EN2
EN1
PGOOD
VSS
Pin Functions
PIN
NAME
BAT
NUMBER
'230H
2,3
'232H
2, 3
I/O
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery.
Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby mode. In
standby mode, OUT is active and battery supplement mode is still available. Connect CE to a low logic level to enable
the battery charger. CE is internally pulled down with approximately 285 kΩ. Do not leave CE unconnected to ensure
proper operation.
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance
when charging is complete and when charger is disabled.
Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB
compliance. See
Table 1
for the description of the operation states. EN1 and EN2 are internally pulled down with
approximately 285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
Adjustable Current Limit Programming Input. Connect a 3.1-kΩ to 7.8-kΩ resistor from ILIM to VSS to program the
maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current.
Input Power Connection. Connect IN to the connected to external DC supply (AC adapter or USB port). The input
operating range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is
suspended. Connect bypass capacitor 1
μF
to 10
μF
to VSS.
Fast-Charge Current Programming Input. Connect a 3-kΩ to 36-kΩ resistor from ISET to VSS to program the fast-charge
current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual
charging current and can be used to monitor charge current. See the
Charge Current Translator
section for more details.
I/O
DESCRIPTION
CE
4
4
I
CHG
EN1
EN2
ILIM
9
6
5
12
9
6
5
12
O
I
I
I
IN
13
13
I
ISET
16
16
I/O
VSS
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Copyright © 2014–2017, Texas Instruments Incorporated
3
Product Folder Links:
bq24230H bq24232H
bq24230H, bq24232H
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
www.ti.com
Pin Functions (continued)
PIN
NAME
ITERM
NUMBER
'230H
-
'232H
15
I
Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the termination
current. Leave ITERM unconnected to set the termination current to the internal default 10% threshold.
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the
regulation voltage. When the input is out of the operation range, OUT is connected to V
BAT
. Connect OUT to the system
load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD
is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail
using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
Termination Dsable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable charger
termination. TD is checked during start-up only and cannot be changed during operation. See the TD section in this data
sheet for a description of the behavior when termination is disabled. TD is internally pulled down to VSS with
approximately 285 kΩ. Do not leave TD unconnected to ensure proper operation.
An internal electrical connection exists between the exposed thermal pad and the VSS pin of the device. The thermal
pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as
the primary ground input for the device. The VSS pin must be connected to ground at all times.
Timer Programming Input. TMR controls the precharge and fast-charge safety timers. Connect TMR to VSS to disable all
safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a desired length. Leave
TMR unconnected to set the timers to the 5-hour fast charge and 30-minute precharge default timer values.
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-kΩ
NTC thermistor. For applications that do not use the TS function, connect a 10-kΩ fixed resistor from TS to VSS to
maintain a valid voltage level on TS.
Ground. Connect to the thermal pad and to the ground rail of the circuit.
I/O
DESCRIPTION
OUT
10,11
10, 11
O
PGOOD
7
7
O
TD
15
-
I
Thermal
Pad
–
TMR
14
14
I
TS
VSS
1
8
1
8
I
–
7 Specifications
7.1 Absolute Maximum Ratings
(1)
over the 0°C to 125°C operating free-air temperature range (unless otherwise noted)
MIN
IN (with respect to VSS)
OUT (with respect to VSS)
V
I
Input voltage
BAT (with respect to VSS)
EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, TD,
ITERM (with respect to VSS)
I
I
I
O
Input current
Output current (continuous)
Output sink current
T
J
T
stg
(1)
Junction temperature
Storage temperature
IN
OUT
BAT (Discharge mode)
CHG, PGOOD
–40
–65
–0.3
–0.3
–0.3
–0.3
MAX
28
7
5
7
600
1700
1700
15
150
150
UNIT
V
V
V
V
mA
mA
mA
mA
°C
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating
Conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
7.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
V
(ESD)
(1)
(2)
Electrostatic discharge
Charged-device model (CDM), per JEDEC specification JESD22-
C101
(2)
±2000
±500
V
UNIT
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±500 V may actually have higher performance.
4
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Copyright © 2014–2017, Texas Instruments Incorporated
Product Folder Links:
bq24230H bq24232H
bq24230H, bq24232H
www.ti.com
SLUSBI8B – JANUARY 2014 – REVISED MAY 2017
7.3 Recommended Operating Conditions
MIN
IN voltage range
V
I
I
IN
I
OUT
I
BAT
I
CHG
T
J
R
ILIM
R
ISET
R
TMR
R
ITERM
IN operating voltage range
Input current, IN pin
Current, OUT pin
Current, BAT pin (discharging)
Current, BAT pin (charging)
Junction temperature
Maximum input current programming resistor
Fast-charge current programming resistor
Timer programming resistor
Termination programming resistor
'232H
–40
3.1
1.74
18
0
'230H
'232H
4.35
4.35
4.35
MAX
26
6.4
10.2
500
1500
1500
500
125
7.8
34.8
72
15
mA
mA
mA
mA
°C
kΩ
kΩ
kΩ
kΩ
UNIT
V
V
7.4 Thermal Information
bq2423xx
THERMAL METRIC
θ
JA
θ
JCtop
θ
JB
ψ
JT
ψ
JB
θ
JCbot
(1)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
(1)
RGT
16 PINS
44.5
54.2
17.2
1.0
17.1
3.8
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report,
SPRA953.
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
INPUT
UVLO
V
hys(UVLO)
V
IN(DT)
V
hys(INDT)
t
DGL(PGOOD)
V
OVP
V
hys(OVP)
t
DGL(OVP)
t
REC(OVP)
Undervoltage lockout
Hysteresis on UVLO
Input power detection threshold
Hysteresis on V
IN(DT)
Deglitch time, input power
detected status
Input overvoltage protection
threshold
Hysteresis on OVP
Input overvoltage blanking time
Input overvoltage recovery time
Time measured from V
IN
: 11 V
→
5 V 1
μs
fall time to PGOOD = LO
V
IN
: 0 V
→
4 V
V
IN
: 4 V
→
0 V
Input power detected when V
IN
> V
BAT
+ V
IN(DT)
V
BAT
= 3.6 V, VIN: 3.5 V
→
4 V
VBAT = 3.6 V, V
IN
: 4 V
→
3.5 V
Time measured from V
IN
: 0 V
→
5 V 1-μs
rise time to PGOOD = LO
('230H) V
IN
: 5 V
→
7 V
('232H) V
IN
: 5 V
→
11 V
('230H) V
IN
: 7 V
→
5V
('232H) V
IN
: 11 V
→
5 V
6.4
10.2
3.2
200
55
20
2
6.6
10.5
110
175
50
2
6.8
10.8
95
3.3
3.4
300
145
V
mV
mV
mV
ms
V
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mV
μs
ms
ILIM, ISET SHORT-CIRCUIT TEST
I
SC
V
SC
QUIESCENT CURRENT
I
BAT(PDWN)
Sleep current into BAT pin
CE = LO or HI, input power not detected, no
load on OUT pin, T
J
= 85°C
6.5
μA
Current source
V
IN
> UVLO and V
IN
> V
BAT
+V
IN(DT)
V
IN
> UVLO and V
IN
> V
BAT
+V
IN(DT)
1.3
520
mA
mV
Copyright © 2014–2017, Texas Instruments Incorporated
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