54ABT374 Octal D-Type Flip-Flop with TRI-STATE Outputs
July 1998
54ABT374
Octal D-Type Flip-Flop with TRI-STATE
®
Outputs
General Description
The ’ABT374 is an octal D-type flip-flop featuring separate
D-type inputs for each flip-flop and TRI-STATE outputs for
bus-oriented applications. A buffered Clock (CP) and Output
Enable (OE) are common to all flip-flops.
n
Guaranteed multiple output switching specifications
n
Output switching specified for both 50 pF and 250 pF
loads
n
Guaranteed simultaneous switching, noise level and
dynamic threshold performance
n
Guaranteed latchup protection
n
High impedance glitch free bus loading during entire
power up and power down cycle
n
Non-destructive hot insertion capability
n
Standard Microcircuit Drawing (SMD) 5962-9314901
Features
n
n
n
n
Edge-triggered D-type inputs
Buffered positive edge-triggered clock
TRI-STATE outputs for bus-oriented applications
Output sink capability of 48 mA, source capability of
24 mA
Ordering Code
Military
54ABT374J/883
54ABT374W/883
54ABT374E/883
J20A
W20A
E20A
Package
Number
20-Lead Ceramic Dual-In-Line
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
Package Description
Connection Diagrams
Pin Assignment for DIP
and Flatpak
Pin Assignment
for LCC
DS100207-2
DS100207-1
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100207
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Pin Descriptions
Pin
Names
D
0
–D
7
CP
OE
O
0
–O
7
Data Inputs
Clock Pulse Input (Active
Rising Edge)
TRI-STATE Output Enable
Input (Active LOW)
TRI-STATE Outputs
Description
Functional Description
The ’ABT374 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Output Enable are common to all
flip-flops. The eight flip-flops will store the state of their indi-
vidual D inputs that meet the setup and hold time require-
ments on the LOW-to-HIGH Clock (CP) transition. With the
Output Enable (OE) LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs
are in a high impedance state. Operation of the OE input
does not affect the state of the flip-flops.
Function Table
Inputs
OE
H
H
H
H
L
L
L
L
CP
H
H
N
N
N
N
Internal
D
L
H
L
H
L
H
L
H
Q
NC
NC
L
H
L
H
NC
NC
Outputs
O
Z
Z
Z
Z
L
H
NC
NC
Hold
Hold
Load
Load
Function
Data Available
Data Available
No Change in Data
No Change in Data
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
N
= LOW-to-HIGH Transition
NC = No Change
Logic Diagram
DS100207-3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
V
CC
Pin Potential to
Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-Off State
in the HIGH State
Current Applied to Output
in LOW State (Max)
−65˚C to +150˚C
−55˚C to +125˚C
−55˚C to +175˚C
−0.5V to +7.0V
−0.5V to +7.0V
−30 mA to +5.0 mA
DC Latchup Source Current:
OE Pin
(Across Comm Operating Range)
Other Pins
Over Voltage Latchup (I/O)
−150 mA
−500 mA
10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Supply Voltage
Military
Minimum Input Edge Rate
Data Input
Enable Input
Clock Input
−55˚C to +125˚C
+4.5V to +5.5V
(∆V/∆t)
50 mV/ns
20 mV/ns
100mV/ns
−0.5V to 5.5V
−0.5V to V
CC
twice the rated I
OL
(mA)
Note 1:
Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
IL
V
ID
I
OZH
I
OZL
I
OS
I
CEX
I
ZZ
I
CCH
I
CCL
I
CCZ
I
CCT
Parameter
Min
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW Voltage
Input HIGH Current
Input HIGH Current Breakdown Test
Input LOW Current
Input Leakage Test
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output High Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
Additional
I
CC
/Input
Outputs Enabled
Outputs TRI-STATE
Outputs TRI-STATE
−100
4.75
50
−50
−275
50
100
50
30
50
2.5
2.5
2.5
54ABT
54ABT
54ABT
2.5
2.0
0.55
5
5
7
−5
−5
V
µA
µA
mA
µA
µA
µA
mA
µA
mA
mA
mA
Max
0.0
0 − 5.5V
0 − 5.5V
Max
Max
0.0
Max
Max
Max
µA
µA
Max
Max
2.0
0.8
−1.2
ABT374
Typ Max
V
V
V
V
V
V
µA
Min
Min
Min
Min
Max
Recognized HIGH Signal
Recognized LOW Signal
I
IN
= −18 mA
I
OH
= −3 mA
I
OH
= −24 mA
I
OL
= 48 mA
V
IN
= 2.7V (Note 4)
V
IN
= V
CC
V
IN
= 7.0V
V
IN
= 0.5V (Note 4)
V
IN
= 0.0V
I
ID
= 1.9 µA
All Other Pins Grounded
V
OUT
= 2.7V; OE = 2.0V
V
OUT
= 0.5V; OE = 2.0V
V
OUT
= 0.0V
V
OUT
= V
CC
V
OUT
= 5.5V; All Others V
CC
or
GND
All Outputs HIGH
All Outputs LOW
OE = V
CC
; All Others at V
CC
or
GND
V
I
= V
CC
− 2.1V
Enable Input V
I
= V
CC
− 2.1V
Data Input V
I
= V
CC
− 2.1V
All Others at V
CC
or GND
Units
V
CC
Conditions
3
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DC Electrical Characteristics
Symbol
I
CCD
Dynamic I
CC
(Note 4)
Note 3:
For 8-bit toggling, I
CCD
<
0.8 mA/MHz.
Note 4:
Guaranteed, but not tested.
(Continued)
ABT374
Min
Typ Max
mA/
0.30
MHz
Max
Outputs Open
OE = GND, (Note 3)
One Bit Toggling, 50% Duty Cycle
Units
V
CC
Conditions
Parameter
No Load
AC Electrical Characteristics
Symbol
Parameter
54ABT
= −55˚C to +125˚C
T
A
V
CC
= 4.5V to 5.5V
C
L
= 50 pF
Min
f
max
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Output Disable Time
Max Clock
Frequency
Propagation Delay
CP to O
n
Output Enable Time
1.4
2.0
0.8
1.5
1.3
1.0
6.6
7.6
5.7
7.2
7.2
7.0
ns
ns
ns
150
Max
MHz
Units
AC Operating Requirements
54ABT
= −55˚C to +125˚C
T
A
V
CC
= 4.5V to 5.5V
C
L
= 50 pF
Min
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
Setup Time, HIGH
or LOW D
n
to CP
Hold Time, HIGH
or LOW D
n
to CP
Pulse Width, CP
HIGH or LOW
2.5
2.5
2.5
2.5
3.3
3.3
ns
ns
Max
ns
Symbol
Parameter
Units
Capacitance
Symbol
C
IN
C
OUT
(Note 5)
Parameter
Input Capacitance
Output Capacitance
Typ
5.0
9.0
Units
pF
pF
Conditions (T
A
= 25˚C)
V
CC
= 0V
V
CC
= 5.0V
Note 5:
C
OUT
is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012.
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4
Capacitance
(Continued)
t
PHL
vs Temperature (T
A
) C
L
= 50 pF,
1 Output Switching Clock to Output
t
PLH
vs Temperature (T
A
) C
L
= 50 pF,
1Output Switching Clock to Output
DS100207-12
DS100207-13
t
PZH
vs Temperature (T
A
) C
L
= 50 pF,
1 Output Switching OE to Output
t
PZL
vs Temperature (T
A
) C
L
= 50 pF,
1 Output Switching OE to Output
DS100207-14
DS100207-15
t
PHZ
vs Temperature (T
A
) C
L
= 50 pF,
1 Output Switching OE to Output
t
PLZ
vs Temperature (T
A
) C
L
= 50 pF,
1 Output Switching OE to Output
DS100207-16
DS100207-17
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Tables.
5
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