EEWORLDEEWORLDEEWORLD

Part Number

Search

7-103669-2

Description
CONNECTOR, 23 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER
CategoryThe connector    The connector   
File Size278KB,2 Pages
ManufacturerTE Connectivity
Websitehttp://www.te.com
Download Datasheet Parametric View All

7-103669-2 Overview

CONNECTOR, 23 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER

7-103669-2 Parametric

Parameter NameAttribute value
Reach Compliance Codeunknown
Is SamacsysN
Other featuresAMPMODU, POLARIZED
Connector typeBOARD CONNECTOR
Contact to complete cooperationMATTE TIN (100) OVER NICKEL (50)
Contact completed and terminatedMATTE TIN (100) OVER NICKEL (50)
Contact point genderMALE
Contact materialNOT SPECIFIED
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee3
MIL complianceNO
Manufacturer's serial number103669
Mixed contactsNO
Installation methodSTRAIGHT
Installation typeBOARD
Number of rows loaded1
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typeSOLDER
Total number of contacts23
Base Number Matches1
[Project source code] [Modelsim FAQ] Port 'xxxx' not found in the connected module
This article and design code were written by FPGA enthusiast Xiao Meige. Without the author's permission, this article is only allowed to be copied and reproduced on online forums, and the original au...
小梅哥 FPGA/CPLD
An error in the CC3200 Out of Box Application example
When I first saw the temperature in the Out of Box example, I wondered if the temperature sensor was broken. Then I thought that the temperature unit might be Fahrenheit. For people who are used to us...
littleshrimp RF/Wirelessly
crc16 source code sharing
// Copyright 2007 Altera Corporation. All rights reserved. // Altera products are protected under numerous U.S. and foreign patents, // maskwork rights, copyrights and other intellectual property laws...
eeleader FPGA/CPLD
[FPGA Design Problem] Three signal edges in the sensitivity list in Verilog
Data is sent when the rising edge of clock clk and signal A is high at the same time, but signal A has a fixed cycle (maintaining the high of 8 clocks), but when the rising edge of clock clk happens, ...
eeleader FPGA/CPLD
Newbie's question: What's wrong with the Baudrate calculation of my P89V51RD2?
Crystal: 32MHz Use timer2 as Baudrate Set TMOD = 0x21; // Use mode3 According to the formula Baud rate = fosc / (16 × (65536(RCAP2H, RCAP2L))) ---------------------------------------------------------...
liluo44 51mcu
I have used 430 to make DS18B20. Please help me modify the program.
Anyone who has used 430 to work on DS18B20, please help me modify the program. Below is the main function and the main parts of 18B20. Do you have any other questions? void main() { WDTCTL = WDTPW + W...
nwx8899 Microcontroller MCU

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1889  2785  21  54  1649  39  57  1  2  34 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号