EEWORLDEEWORLDEEWORLD

Part Number

Search

UPD77017GC-XXX-9EU

Description
Digital Signal Processor, 30-Ext Bit, 33MHz, CMOS, PQFP100, 14 X 14 MM, FINE PITCH, PLASTIC, TQFP-100
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size454KB,60 Pages
ManufacturerNEC Electronics
Download Datasheet Parametric View All

UPD77017GC-XXX-9EU Overview

Digital Signal Processor, 30-Ext Bit, 33MHz, CMOS, PQFP100, 14 X 14 MM, FINE PITCH, PLASTIC, TQFP-100

UPD77017GC-XXX-9EU Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNEC Electronics
Parts packaging codeQFP
package instructionLFQFP,
Contacts100
Reach Compliance Codecompliant
ECCN code3A991.A.2
Address bus width14
barrel shifterYES
boundary scanNO
maximum clock frequency33 MHz
External data bus width30
FormatFIXED POINT
Internal bus architectureMULTIPLE
JESD-30 codeS-PQFP-G100
JESD-609 codee0
length14 mm
low power modeYES
Number of terminals100
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.27 mm
Maximum supply voltage3.6 V
Minimum supply voltage2.7 V
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
uPs/uCs/peripheral integrated circuit typeDIGITAL SIGNAL PROCESSOR, OTHER

UPD77017GC-XXX-9EU Preview

DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD77015,77017,77018
16 bits, Fixed-point Digital Signal Processor
µ
PD77015, 77017, 77018 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal
processing with its demand for high speed and precision.
FEATURES
FUNCTIONS
• Instruction cycle: 30 ns (MIN.)
Operation clock: 33 MHz
External clock: 33, 16.5, 8.25, 4.125 MHz
Crystal: 33 MHz
• On-chip PLL to provide higher operation clock than the external clock
• Dual load/store
• Hardware loop function
• Conditional execution
• Executes product-sum operation in one instruction cycle
PROGRAMMING
• 16 bits
×
16 bits + 40 bits
40 bits multiply accumulator
• 8 general registers (40 bits each)
• 8 ROM/RAM data pointer: each data memory area has 4 registers
• 10 source interrupts (external: 4, internal: 6)
• 3 operand instructions (example: R0 = R0 +R1L∗R2L)
• Nonpipeline on execution stage
MEMORY AREAS
• Instruction memory area : 64K words
×
32 bits
• Data memory areas : 64K words
×
16 bits
×
2 (X memory, Y memory)
CLOCK GENERATOR
• Mask option for CLKOUT pin:
Fixed to the low level.
Does not output the internal system clock.
• Selectable source clock: external clock input and crystal resonator
[External clock]
On-chip PLL to provide higher operation clock (33 MHz MAX.) than the external clock.
Variable multiple rates (1, 2, 4, 8) by mask option.
[Crystal resonator]
Oscillation frequency corresponds directly to the system clock frequency (Sure to specify the mask option
frequency multiple as "1").
In this document, all descriptions of the
µ
PD77017 also apply to the
µ
PD77015 and
µ
PD77018, unless
otherwise specified.
The information in this document is subject to change without notice.
Document No. U10902EJ3V0DS00 (3rd edition)
Date Published June 1997 N
Printed in Japan
The mark
shows major revised points.
©
1993, 1994
µ
PD77015, 77017, 77018
ON-CHIP PERIPHERAL
• I/O port: 4 bits
• Serial I/O (16 bits): 2 channels
• Host I/O (8 bits): 1 channel
CMOS
+3 V single power supply
ORDERING INFORMATION
Part Number
Package
100-pin plastic TQFP (FINE PITCH) (14
×
14 mm)
100-pin plastic TQFP (FINE PITCH) (14
×
14 mm)
100-pin plastic TQFP (FINE PITCH) (14
×
14 mm)
µ
PD77015GC-×××-9EU
µ
PD77017GC-×××-9EU
µ
PD77018GC-×××-9EU
Remark
×××
indicates a code suffix.
2
BLOCK DIAGRAM
X–Bus
External
Memory
Y–Bus
Serial
I/O #1
X Memory
Data
Pointers
X Memory
Y Memory
Data
Pointers
Y Memory
R0–R7
Serial
I/O #2
Main Bus
ALU (40)
Ports
Loop
Control
Stack
Instruction
Memory
MPY
16×16+40
40
PC Stack
Interrupt
Control
Host I/O
µ
PD77015, 77017, 77018
CPU Control
Wait
Controller
INT1 – INT4
WAIT RESET CLKOUT
X1 X2
IE I/O
3
µ
PD77015, 77017, 77018
FUNCTIONAL PIN GROUPS
+3 V
SO1
SORQ1
SOEN1
Serial Interface #1
SCK1
SI1
SIEN1
SIAK1
SO2
SOEN2
SCK2
SI2
SIEN2
Ports
P0 - P3
HCS
HA0, HA1
HRD
HRE
HWR
HWE
HD0 - HD7
V
DD
RESET
INT1
INT2
INT3
INT4
X1
X2
CLKOUT
TDO, TICE
TCK, TDI, TMS
HOLDRQ
BSTB
HOLDAK
X/Y
DA0 - DA13
D0 - D15
WAIT
MRD
MWR
(14)
(16)
Interrupts
Serial Interface #2
(2)
(3)
Debugging
Interface
(4)
Data Bus
Control
(2)
Host Interface
External
Data
Memory
(8)
GND
4
Functional Differences among the
µ
PD7701× Family
Item
Internal instruction RAM
Internal instruction ROM
External instruction memory
Data RAM (X/Y memory)
Data ROM (X/Y memory)
External data memory
Instruction cycle
(Maximum operation speed)
External clock
(at maximum operation speed)
Crystal
(at maximum operation speed)
Instruction
Serial interface (2 Channels)
66 MHz
µ
PD77016
1.5K words
None
48K words
2K words each
None
48K words each
µ
PD77015
µ
PD77017
256 words
µ
PD77018
µ
PD77018A
µ
PD77019
4K words
4K words
12K words
None
24K words
1K words each
2K words each
2K words each
4K words each
16K words each
3K words each
12K words each
30 ns (33 MHz)
33/16.5/8.25/4.125 MHz
Variable multiple rate (1, 2, 4, 8 ) by mask option.
19 ns (52 MHz)
52/ 26/ 17.333/ 13/6.5 MHz
Variable multiple rate (1, 2, 3, 4, 8 ) by
mask option.
52 MHz
STOP instruction is added.
Channel 1 has the
same functions
as channel 2.
5V
160-pin plastic QFP
33 MHz
Channel 1 has the same functions as that of the
µ
PD77016.
Channel 2 has no SORQ2 or SIAK2 pin (Channel 2 is used for CODEC connection).
3V
Power supply
Package
µ
PD77015, 77017, 77018
100-pin plastic TQFP
5
Show your own waveform
I made the board myself, programmed it, and got the waveform. Hehe. I don't know why I can't upload pictures....
安_然 DSP and ARM Processors
How to map the physical (sector) address of a USB drive to a drive letter (Windows OS)
I am working on partitioning a USB flash drive recently. By modifying the partition table (DPT) of the USB flash drive's master boot record, the USB flash drive can be divided into more than one parti...
蒙蒙静 Embedded System
f Ask for electronic password lock paper
My graduation project is an electronic [b][color=#ff0000]password lock[/color][/b]. If any brother or sister has done this graduation project before and has the paper and related literature and foreig...
baictrd MCU
Calculation of stack usage in C2000 DSP
[backcolor=white][color=#000000]When doing communication, I found that the TMS320F280XX chip sometimes crashes. His communication software uses the library provided by TI, and he made the communicatio...
灞波儿奔 Microcontroller MCU
DSSD R&D workshop (transferred)
Reposted from http://mp.weixin.qq.com/s?__biz=MzAwMDM4NTUyNw==&mid=402824889&idx=1&sn=81745266bc74ee8db41266ab69ebd665&3rd=MzA3MDU4NTYzMw==&scene=6#rd[/url] Let's take a look at a foreigner's visit to...
白丁 FPGA/CPLD
Problems encountered by ucos on complex tasks
The SD card task I created was tested on the hardware in the bare metal state without any problems. I created 4 subtasks under the UCOS operating system, three of which were running light tasks to pro...
a2743919 Real-time operating system RTOS

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 219  1126  1273  1611  2863  5  23  26  33  58 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号