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DSPIC33EP512GP806T-I/MR

Description
digital signal processors & controllers - dsp, dsc 512kb FL 53248bytes ram GP
Categorysemiconductor    Other integrated circuit (IC)   
File Size4MB,623 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance  
Download Datasheet Download user manual Parametric View All

DSPIC33EP512GP806T-I/MR Overview

digital signal processors & controllers - dsp, dsc 512kb FL 53248bytes ram GP

DSPIC33EP512GP806T-I/MR Parametric

Parameter NameAttribute value
ManufactureMicrochi
Product CategoryDigital Signal Processors & Controllers - DSP, DSC
RoHSYes
CoredsPIC33
Data Bus Width16 bi
Program Memory Size512 kB
Data RAM Size52 kB
Maximum Clock Frequency60 MHz
Operating Supply Voltage3.3 V
Package / CaseQFN-64
Mounting StyleSMD/SMT
On-Chip ADCYes
PackagingReel
Processor SeriesdsPIC33EP
ProducDSCs
Factory Pack Quantity3300
dsPIC33EPXXX(GP/MC/MU)806/810/814
and PIC24EPXXX(GP/GU)810/814
16-Bit Microcontrollers and Digital Signal Controllers with
High-Speed PWM, USB and Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
Timers/Output Compare/Input Capture
• 27 General Purpose Timers:
- Nine 16-bit and up to four 32-bit Timers/Counters
- 16 OC modules configurable as Timers/Counters
- Two 32-bit Quadrature Encoder Interface (QEI)
modules configurable as Timers/Counters
• 16 IC modules
• Peripheral Pin Select (PPS) to allow Function Remap
• Real-Time Clock and Calendar (RTCC) module
Core: 16-Bit dsPIC33E/PIC24E CPU
Code-Efficient (C and Assembly) architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL Plus Hardware Divide
32-Bit Multiply Support
Clock Management
2% Internal Oscillator
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Fast Wake-up and Start-up
Communication Interfaces
• USB 2.0 OTG-Compliant Full-Speed Interface
• Four UART modules (15 Mbps)
- Supports LIN/J2602 protocols and IrDA
®
• Four 4-Wire SPI modules (15 Mbps)
• Two ECAN™ modules (1 Mbaud) CAN 2.0B Support
• Two I
2
C modules (up to 1 Mbaud) with SMBus Support
• Data Converter Interface (DCI) module with Support for
I
2
S and Audio Codecs
• PPS to allow Function Remap
• Parallel Master Port (PMP)
• Programmable Cyclic Redundancy Check (CRC)
Power Management
Low-Power Management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
1.0 mA/MHz Dynamic Current (typical)
60 µA I
PD
Current (typical)
High-Speed PWM
Up to Seven PWM Pairs with Independent Timing
Dead Time for Rising and Falling Edges
8.32 ns PWM Resolution
PWM Support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault Inputs
• Flexible Trigger Configurations for ADC Conversions
Direct Memory Access (DMA)
• 15-Channel DMA with User-Selectable
Priority Arbitration
• UART, USB, SPI, ADC, ECAN™, IC, OC, Timers,
DCI/I
2
S, PMP
Input/Output
Sink/Source 10 mA on All Pins
5V Tolerant Pins
Selectable Open-Drain, Pull-ups and Pull-Downs
Up to 5 mA Overvoltage Clamp Current
External Interrupts on All I/O pins
Advanced Analog Features
• Two Independent ADC modules:
- One ADC configurable as 10-bit, 1.1 Msps with four
S&H or 12-bit, 500 ksps with one S&H
- One 10-bit ADC, 1.1 Msps with four S&H
- Eight S&H using both ADC 10-bit modules
- 24 analog channels (64-pin devices) up to 32 analog
channels (100/121/144-pin devices)
• Flexible and Independent ADC Trigger Sources
• Comparators:
- Up to three Analog Comparator modules
- Programmable references with 32 voltage points
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) Planned
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) Planned
• Class B Safety Library, IEC 60730
Debugger Development Support
In-Circuit and In-Application Programming
Five Program and Three Complex Data Breakpoints
IEEE 1149.2 Compatible (JTAG) Boundary Scan
Trace and Run-Time Watch
2009-2012 Microchip Technology Inc.
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