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8524AYLFT

Description
clock buffer 22 hstl out buffer
Categorysemiconductor    Other integrated circuit (IC)   
File Size262KB,18 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Environmental Compliance  
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clock buffer 22 hstl out buffer

8524AYLFT Parametric

Parameter NameAttribute value
ManufactureIDT (Integrated Device Technology)
Product CategoryClock Buffe
RoHSYes
Package / CaseTQFP-64
PackagingReel
Factory Pack Quantity500
Low Skew, 1-to-22
Differential-to-HSTL Fanout Buffer
G
ENERAL
D
ESCRIPTION
The 8524 is a low skew, 1-to-22 Differential-to-HSTL
Fanout Buffer . The 8524 has two selectable clock inputs.
The CLK, nCLK pair can accept most standard differential
input levels. The PCLK, nPCLK pair can accept LVPECL,
CML, or SSTL input levels. The device is inter nally
synchronized to eliminate runt pulses on the outputs during
asynchronous assertion/deassertion of the OE pin. The
8524’s low output and part-to-part skew characteristics
make it ideal for workstation, server, and other high
performance clock distribution applications.
8524
DATA SHEET
F
EATURES
Twenty-two differential HSTL outputs
each with the ability to drive 50Ω to ground
Selectable differential CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, HSTL, SSTL, HCSL
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
Maximum output frequency: 500MHz
Translates any single-ended input signal (LVCMOS, LVTTL,
GTL) to HSTL levels with resistor bias on nCLK input
Output skew: 80ps (maximum)
Part-to-part skew: 700ps (maximum)
Jitter, RMS: 0.04ps (typical)
LVPECL and HSTL mode operating voltage supply range:
V
DD
= 3.3V ± 5%, V
DDO
= 1.6V to 2V, GND = 0V
0°C to 85°C ambient operating temperature
B
LOCK
D
IAGRAM
CLK_SEL
CLK
nCLK
PCLK
nPCLK
P
IN
A
SSIGNMENT
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
49
32
50
31
51
30
52
29
53
28
54
27
55
26
56
25
57
24
58
23
59
22
60
21
61
20
62
19
63
18
64
17
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
V
DDO
nQ13
Q13
nQ12
Q12
nQ11
Q11
nQ10
Q10
nQ9
Q9
nQ8
Q8
nQ7
Q7
V
DDO
V
DDO
nQ6
Q6
nQ5
Q5
nQ4
Q4
nQ3
Q3
nQ2
Q2
nQ1
Q1
nQ0
Q0
V
DDO
V
DDO
Q14
nQ14
Q15
nQ15
Q16
nQ16
Q17
nQ17
Q18
nQ18
Q19
nQ19
Q20
nQ20
V
DDO
0
22
22
Q0:Q21
nQ0:nQ21
1
LE
Q
OE
D
ICS8524
64-Lead TQFP E-Pad
10mm x 10mm x 1.0mm package body
Y package
Top View
8524 REVISION B 11/9/15
1
V
DDO
nc
nc
V
DD
CLK
nCLK
CLK_SEL
PCLK
nPCLK
GND
OE
nc
nc
nQ21
Q21
V
DDO
©2015 Integrated Device Technology, Inc.
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