Intel StrataFlash
®
Embedded Memory
(P30)
1-Gbit P30 Family
Datasheet
Product Features
■
Security
— 85/88 ns initial access
— One-Time Programmable Registers:
• 64 unique factory device identifier bits
— 40 MHz with zero wait states, 20 ns clock-to-
• 64 user-programmable OTP bits
data output synchronous-burst read mode
• Additional 2048 user-programmable OTP bits
— 25 ns asynchronous-page read mode
— Selectable OTP Space in Main Array:
— 4-, 8-, 16-, and continuous-word burst mode
• 4x32KB parameter blocks + 3x128KB main
— Buffered Enhanced Factory Programming
blocks (top or bottom configuration)
(BEFP) at 5 µs/byte (Typ)
— Absolute write protection: V
PP
= V
SS
— 1.8 V buffered programming at 7 µs/byte (Typ)
— Power-transition erase/program lockout
■
Architecture
— Individual zero-latency block locking
— Multi-Level Cell Technology: Highest Density
— Individual block lock-down
at Lowest Cost
■
Software
— Asymmetrically-blocked architecture
— 20 µs (Typ) program suspend
— Four 32-KByte parameter blocks: top or
— 20 µs (Typ) erase suspend
bottom configuration
— Intel
®
Flash Data Integrator optimized
— 128-KByte main blocks
— Basic Command Set and Extended Command
■
Voltage and Power
Set compatible
— V
CC
(core) voltage: 1.7 V – 2.0 V
— Common Flash Interface capable
— V
CCQ
(I/O) voltage: 1.7 V – 3.6 V
■
Density and Packaging
— Standby current: 55 µA (Typ) for 256-Mbit
— 64/128/256-Mbit densities in 56-Lead TSOP
— 4-Word synchronous read current:
package
13 mA (Typ) at 40 MHz
— 64/128/256/512-Mbit densities in 64-Ball
■
Quality and Reliability
Intel
®
Easy BGA package
— Operating temperature: –40 °C to +85 °C
• 1-Gbit in SCSP is –30 °C to +85 °C
— 64/128/256/512-Mbit and 1-Gbit densities in
Intel
®
QUAD+ SCSP
— Minimum 100,000 erase cycles per block
— 16-bit wide data bus
— ETOX™ VIII process technology (130 nm)
■
High performance
The Intel StrataFlash
®
Embedded Memory (P30) product is the latest generation of Intel
StrataFlash
®
memory devices. Offered in 64-Mbit up through 1-Gbit densities, the P30 device
brings reliable, two-bit-per-cell storage technology to the embedded flash market segment.
Benefits include more density in less space, high-speed interface, lowest cost-per-bit NOR
device, and support for code and data storage. Features include high-performance synchronous-
burst read mode, fast asynchronous access times, low power, flexible security options, and three
industry standard package choices.
The P30 product family is manufactured using Intel
®
130 nm ETOX™ VIII process technology.
Order Number: 306666, Revision: 001
April 2005
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
This document contains information on products in the design phase of development. The information here is subject to change without notice. Do not
finalize a design with this information.
StrataFlash® Embedded Memory (P30) Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing
your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at
http://www.intel.com.
Copyright © 2005, Intel Corporation
* Other names and brands may be claimed as the property of others.
April 2005
2
Intel StrataFlash
®
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
1-Gbit P30 Family
Contents
1.0 Introduction
...............................................................................................................................7
1.1
1.2
1.3
Nomenclature .......................................................................................................................7
Acronyms ..............................................................................................................................7
Conventions..........................................................................................................................8
2.0 Functional Overview
..............................................................................................................9
3.0 Package Information
............................................................................................................10
3.1
3.2
3.3
4.1
4.2
4.3
4.4
56-Lead TSOP Package .....................................................................................................10
64-Ball Easy BGA Package ................................................................................................12
QUAD+ SCSP Packages....................................................................................................13
Signal Ballout......................................................................................................................17
Signal Descriptions .............................................................................................................20
SCSP Configurations ..........................................................................................................22
Memory Maps .....................................................................................................................24
4.0 Ballout and Signal Descriptions
......................................................................................17
5.0 Maximum Ratings and Operating Conditions
...........................................................29
5.1
5.2
6.1
6.2
7.1
7.2
7.3
7.4
7.5
8.1
8.2
8.3
9.1
Absolute Maximum Ratings ................................................................................................29
Operating Conditions ..........................................................................................................30
DC Current Characteristics .................................................................................................31
DC Voltage Characteristics.................................................................................................32
AC Test Conditions.............................................................................................................33
Capacitance ........................................................................................................................34
AC Read Specifications ......................................................................................................35
AC Write Specifications ......................................................................................................41
Program and Erase Characteristics ....................................................................................45
Power Up and Down ...........................................................................................................46
Reset Specifications ...........................................................................................................46
Power Supply Decoupling...................................................................................................47
Bus Operations ...................................................................................................................48
9.1.1 Reads ....................................................................................................................48
9.1.2 Writes.....................................................................................................................49
9.1.3 Output Disable .......................................................................................................49
9.1.4 Standby..................................................................................................................49
9.1.5 Reset .....................................................................................................................49
Device Commands .............................................................................................................50
Command Definitions .........................................................................................................51
6.0 Electrical Specifications
.....................................................................................................31
7.0 AC Characteristics
................................................................................................................33
8.0 Power and Reset Specifications
.....................................................................................46
9.0 Device Operations
.................................................................................................................48
9.2
9.3
Datasheet
Intel StrataFlash
®
Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
3
1-Gbit P30 Family
10.0 Read Operations
.................................................................................................................... 53
10.1
10.2
10.3
Asynchronous Page-Mode Read........................................................................................ 53
Synchronous Burst-Mode Read.......................................................................................... 53
Read Configuration Register .............................................................................................. 54
10.3.1 Read Mode ............................................................................................................ 55
10.3.2 Latency Count........................................................................................................ 55
10.3.3 WAIT Polarity......................................................................................................... 57
10.3.4 Data Hold............................................................................................................... 58
10.3.5 WAIT Delay............................................................................................................ 59
10.3.6 Burst Sequence ..................................................................................................... 59
10.3.7 Clock Edge ............................................................................................................ 59
10.3.8 Burst Wrap............................................................................................................. 59
10.3.9 Burst Length .......................................................................................................... 60
Word Programming............................................................................................................. 61
11.1.1 Factory Word Programming................................................................................... 62
Buffered Programming........................................................................................................ 62
Buffered Enhanced Factory Programming ......................................................................... 63
11.3.1 BEFP Requirements and Considerations .............................................................. 64
11.3.2 BEFP Setup Phase................................................................................................ 64
11.3.3 BEFP Program/Verify Phase ................................................................................. 64
11.3.4 BEFP Exit Phase ................................................................................................... 65
Program Suspend............................................................................................................... 65
Program Resume................................................................................................................ 66
Program Protection............................................................................................................. 66
Block Erase......................................................................................................................... 67
Erase Suspend ................................................................................................................... 67
Erase Resume .................................................................................................................... 68
Erase Protection ................................................................................................................. 68
Block Locking...................................................................................................................... 69
13.1.1 Lock Block ............................................................................................................. 69
13.1.2 Unlock Block .......................................................................................................... 69
13.1.3 Lock-Down Block ................................................................................................... 69
13.1.4 Block Lock Status .................................................................................................. 70
13.1.5 Block Locking During Suspend.............................................................................. 70
Selectable One-Time Programmable Blocks...................................................................... 71
Protection Registers ........................................................................................................... 72
13.3.1 Reading the Protection Registers .......................................................................... 73
13.3.2 Programming the Protection Registers.................................................................. 73
13.3.3 Locking the Protection Registers ........................................................................... 74
Read Status Register.......................................................................................................... 75
14.1.1 Clear Status Register............................................................................................. 76
Read Device Identifier ........................................................................................................ 76
11.0 Programming Operations
.................................................................................................. 61
11.1
11.2
11.3
11.4
11.5
11.6
12.1
12.2
12.3
12.4
13.1
12.0 Erase Operations
................................................................................................................... 67
13.0 Security Modes
....................................................................................................................... 69
13.2
13.3
14.0 Special Read States
............................................................................................................. 75
14.1
14.2
April 2005
4
Intel StrataFlash
®
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
1-Gbit P30 Family
14.3
CFI Query ...........................................................................................................................77
Appendix A
Appendix B
Appendix C
Appendix D
Appendix E
Appendix F
Write State Machine
..........................................................................................78
Flowcharts
............................................................................................................85
Common Flash Interface
................................................................................93
Additional Information
................................................................................... 100
Ordering Information for Discrete Products
........................................ 101
Ordering Information for SCSP Products
..............................................102
Datasheet
Intel StrataFlash
®
Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
5
Analogue and Mixed Signal
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