K4H560838N-LLCCT datasheet, PDF

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K4H560838N-LLCCT: DescriptionDDR DRAM, 32MX8, 0.65ns, CMOS, PDSO66; Categorystorage storage; File Size589KB，24 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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K4H560838N-LLCCT Overview

DDR DRAM, 32MX8, 0.65ns, CMOS, PDSO66

K4H560838N-LLCCT Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	1122314872
package instruction	TSSOP, TSSOP66,.46
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	0.65 ns
Maximum clock frequency (fCLK)	200 MHz
I/O type	COMMON
interleaved burst length	2,4,8
JESD-30 code	R-PDSO-G66
JESD-609 code	e3
memory density	268435456 bit
Memory IC Type	DDR1 DRAM
memory width	8
Humidity sensitivity level	1
Number of terminals	66
word count	33554432 words
character code	32000000
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32MX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP66,.46
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	8192
Continuous burst length	2,4,8
Maximum standby current	0.003 A
Maximum slew rate	0.125 mA
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL

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Rev. 1.01, May. 2010

K4H560438N

K4H560838N

K4H561638N

256Mb N-die DDR SDRAM

66TSOP-(II) with Lead-Free & Halogen-Free

(RoHS compliant)

datasheet

SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND

SPECIFICATIONS WITHOUT NOTICE.

Products and specifications discussed herein are for reference purposes only. All information discussed

herein is provided on an "AS IS" basis, without warranties of any kind.

This document and all information discussed herein remain the sole and exclusive property of Samsung

Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property

right is granted by one party to the other party under this document, by implication, estoppel or other-

wise.

Samsung products are not intended for use in life support, critical care, medical, safety equipment, or

similar applications where product failure could result in loss of life or personal or physical harm, or any

military or defense application, or any governmental procurement to which special terms or provisions

may apply.

For updates or additional information about Samsung products, contact your nearest Samsung office.

All brand names, trademarks and registered trademarks belong to their respective owners.

ⓒ

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K4H560438N

K4H560838N

K4H561638N

datasheet

Rev. 1.01

DDR SDRAM

Table Of Contents

256Mb N-die DDR SDRAM

1. Key Features................................................................................................................................................................. 4

2. Ordering Information ..................................................................................................................................................... 4

3. Operating Frequencies ................................................................................................................................................. 4

4. Pin / Ball Description ..................................................................................................................................................... 5

5. Package Physical Dimension........................................................................................................................................ 6

6. Block Diagram (16Mb x4 / 8Mbx8 / 4Mx16 I/O x4 Banks) ............................................................................................ 7

7. Input/Output Function Description ................................................................................................................................ 8

8. Command Truth Table .................................................................................................................................................. 9

9. General Description ...................................................................................................................................................... 10

10. Absolute Maximum Rating .......................................................................................................................................... 10

11. DC Operating Conditions ............................................................................................................................................ 10

12. DDR SDRAM Spec Items & Test Conditions .............................................................................................................. 11

13. Input/Output Capacitance ........................................................................................................................................... 11

14. Detailed test condition for DDR SDRAM IDD1 & IDD7A ............................................................................................ 12

15. DDR SDRAM IDD Spec Table .................................................................................................................................... 13

16. AC Operating Conditions ............................................................................................................................................ 14

17. AC Overshoot/Undershoot specification for Address and Control Pins ...................................................................... 14

18. Overshoot/Undershoot specification for Data, Strobe and Mask Pins ........................................................................ 15

19. AC Timing Parameters & Specifications ..................................................................................................................... 16

20. System Characteristics for DDR SDRAM ................................................................................................................... 17

21. Component Notes ....................................................................................................................................................... 18

22. System Notes.............................................................................................................................................................. 20

23. IBIS : I/V Characteristics for Input and Output Buffers................................................................................................ 21

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