REVISIONS
LTR
A
DESCRIPTION
Add five vendors, CAGE 61772, CAGE 04713, CAGE 60991, CAGE
50088, and CAGE 65786. Add 04 new device types. Add case
outline letter Y.
Boilerplate update, part of 5-year review. ksr
Updated body of drawing to reflect current requirements. - glg
Update drawing to meet current MIL-PRF-38535 requirements. – glg
DATE (YR-MO-DA)
88-06-17
APPROVED
Michael A. Frye
B
C
D
05-09-29
11-01-05
17-10-16
Raymond Monnin
Charles Saffle
Charles Saffle
CURRENT CAGE CODE 67268
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
D
15
D
16
D
17
D
18
REV
D
19
D
20
D
21
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
10
D
11
D
12
D
13
D
14
SHEET
PREPARED BY
Rick Officer
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
Raymond Monnin
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
MICROCIRCUIT, DIGITAL, CMOS,
MEMORY, 64K X 1, STATIC RAM,
MONOLITHIC SILICON
SIZE
CAGE CODE
24 June 1986
REVISION LEVEL
D
A
SHEET
14933
1 OF
21
5962-86015
5962-E008-18
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-86015
01
X
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
04
05
06
07
08
Generic number
see 6.6
see 6.6
see 6.6
see 6.6
see 6.6
see 6.6
see 6.6
see 6.6
64K
64K
64K
64K
64K
64K
64K
64K
x
x
x
x
x
x
x
x
Circuit
1-bit, SRAM, TS
1-bit, SRAM, TS
1-bit, SRAM, TS
1-bit, SRAM, TS
1-bit, SRAM, TS
1-bit, SRAM, TS
1-bit, SRAM, TS
1-bit, SRAM, TS
Acess time
35 ns
35 ns
45 ns
45 ns
55 ns
55 ns
70 ns
70 ns
(data retention)
(data retention)
(data retention)
(data retention)
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Z
Descriptive designator
See Figure 1
See Figure 2
See Figure 3
Terminals
22
22
22
Package style
dual-in-line package
dual-in-line package
chip carrier package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Input voltage range .............................................................................
Storage temperature range .................................................................
Lead temperature (soldering, 10 seconds) ..........................................
Thermal resistance, junction-to-case (θJC)
Case X ...........................................................................................
Case Y ...........................................................................................
Case Z ...........................................................................................
Output voltage applied ........................................................................
Output current .....................................................................................
Maximum power dissipation (PD) ......................................................
Maximum junction temperature (TJ) ....................................................
1.4 Recommended operating conditions.
Supply voltage range ..........................................................................
Input high voltage ...............................................................................
Input low voltage ................................................................................
Fanout current with output high (each) ................................................
Case operating temperature range (TC) .............................................
4.5 V dc minimum to 5.5 V dc maximum
2.2 V dc to V
CC
+0.5 V
-0.5 V dc to +0.8 V dc
4.0 mA
-55°C to +125°C
-0.5 V dc to VCC + 0.5 V dc
-65°C to +150°C
+270°C
+15°C / W 1/
+30°C / W 1/
+30°C / W 1/
-0.5 V dc to +7.0 V dc
50 mA
1.0 W
+150°C
1/ When a thermal resistance value is listed in MIL-STD-1835, it shall supersede the value stated herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-86015
SHEET
D
2
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://quicksearch.dla.mil/
or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-
38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity
approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make
modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These
modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-
38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Terminal connections. The terminal connections shall be as specified on figure 4.
3.2.2 Truth table. The truth table shall be as specified on figure 5.
3.2.3 Functional block diagram. The functional block diagram shall be as specified on figure 6.
3.2.4 Case outlines. The case outlines shall be in accordance with figure 1 and 1.2.2 herein.
3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only.
Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the
internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor
testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as
provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-86015
SHEET
D
3
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed
in 1.2 herein. In addition, the manufacturer's PIN may also be marked.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and
Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements
of MIL-PRF-38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects
this drawing.
3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a.
Burn-in test, method 1015 of MIL-STD-883.
(1)
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
T
A
= +125°C, minimum.
(2)
b.
Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-
883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a.
b.
c.
d.
Tests shall be as specified in table II herein.
Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
Subgroup 4 (C
IN
,C
OUT
measurements) shall be measured only for the initial test and after process or design changes
which may affect input or output capacitance.
Subgroups 7 and 8 test sufficient to verify truth table of figure 5.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-86015
SHEET
D
4
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
1/ 2/ 3/
Group A
subgroups
Device
type
Limits
Min
High level output voltage
V
OH
I
OH
= -4.0 mA,
V
IH
= 2.2 V, V
IL
= 0.8 V
I
OL
= +8.0 mA,
V
IL
= 0.8 V, V
IH
= 2.2 V
1, 2, 3
All
2.4
Max
V
Unit
Low level output voltage
V
OL
1, 2, 3
All
0.4
V
High impedance (off-state)
output leakage current
I
OLZ
CS
≥
V
IH
, V
OH
= 0.0 V
V
CC
= 5.5 V
1, 2, 3
All
-10
10
µA
I
OHZ
CS
≥
V
IH
, V
OH
= 5.5 V
V
CC
= 5.5 V
V
IH
= 5.5 V, V
CC
= 5.5 V
V
IL
= 0.0 V, V
CC
= 5.5 V
D
OUT
= open,
CS
= V
IL
V
CC
= 5.5 V
1, 2, 3
All
-10
10
µA
High level input leakage current I
IH
Low-level input leakage current
Operating supply current
I
IL
I
CC1
1, 2, 3
1, 2, 3
1, 2, 3
All
All
03,05,07
01,02,04,
06,08
-10
-10
10
10
105
90
µA
µA
mA
DC supply current
I
CC2
D
OUT
= open,
CS
= V
IL
Minimum read cycle time
V
CC
= 5.5 V
1, 2, 3
03,05,07
02
01,04,06,
08
120
70
95
mA
Standby supply current (TTL)
I
CC3
CS
≥
V
IH
, V
CC
= 5.5 V,
Inputs = 0.8 V or 2.2 V
1, 2, 3
03.05,07
01,02,04,
06,08
50
35
mA
Full standby supply current
(CMOS)
Data retention current
4/
I
CC4
CS
≥
V
CC
- 0.2 V, V
CC
= 5.5 V
Inputs:
≥
V
CC
- 0.2 V or
≤
0.2 V
V
DR
= 2.0 V,
CS
≥
V
CC
- 0.2 V
Inputs:
≥
V
CC
- 0.2 V or
≤
0.2 V
V
IN
= 0.0 V,
5/
V
CC
= 5.0 V, f = 1 MHz
V
OUT
= 0.0 V (see 4.3.1c)
1, 2, 3
All
20
mA
I
CCDR
1, 2, 3
02,04,06,
08
All
All
1
mA
Input capacitance
Output capacitance
Data retention voltage
4/
C
IN
C
OUT
V
DR
4
8
10
2.0
5.5
pF
pF
V
CS
= V
DR
,
Inputs:
≥
V
DR
- 0.2 V or
≤
0.2 V
See 4.3.1d
V
IL
= 0.0 V, V
IH
= 3.0 V
1, 2, 3
02,04,06,
08
All
Functional tests
7, 8
See footnotes at end of table
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-86015
SHEET
D
5
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