Modes of Operation and Pin-outs ................................................................................................................................................ 6
Pin-out Top Views................................................................................................................................................................. 6
Test Circuit Diagrams for LVCMOS and Clipped Sinewave Outputs ........................................................................................... 7
Frequency Stability ............................................................................................................................................................. 11
Output frequency and format .............................................................................................................................................. 11
Output Frequency Tuning ................................................................................................................................................... 11
Pin 1 Configuration (OE, VC, or NC) .................................................................................................................................. 12
Control Voltage Bandwidth ................................................................................................................................................. 15
Pull Range, Absolute Pull Range ............................................................................................................................................... 16
I
2
C Control Registers ................................................................................................................................................................. 21
Register Address: 0x00. Digital Frequency Control Least Significant Word (LSW) ............................................................ 21
Register Address: 0x01. OE Control, Digital Frequency Control Most Significant Word (MSW) ......................................... 22
Register Address: 0x02. DIGITAL PULL RANGE CONTROL ............................................................................................ 23
Register Address: 0x05. PULL-UP DRIVE STRENGTH CONTROL .................................................................................. 24
Register Address: 0x06. PULL-DOWN DRIVE STRENGTH CONTROL ............................................................................ 25
Serial Interface Configuration Description.................................................................................................................................. 26
Serial Signal Format .................................................................................................................................................................. 26
Parallel Signal Format................................................................................................................................................................ 27
Parallel Data Format .................................................................................................................................................................. 27
I
2
C Timing Specification ............................................................................................................................................................. 29
I
2
C Device Address Modes ........................................................................................................................................................ 30
Schematic Example ................................................................................................................................................................... 31
Dimensions and Patterns ........................................................................................................................................................... 32
Ordering Information .................................................................................................................................................................. 34
Rev 0.60
Page 2 of 36
www.sitime.com
SiT5357
60 to 220 MHz,
±0.1
to
±0.25
ppm
Elite Platform™ Precision Super-TCXO
Electrical Characteristics
PRELIMINARY
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and 3.3V Vdd
Table 1. Output Characteristics
Parameters
Output Frequency Range
Duty Cycle
Rise/Fall Time
Output Voltage High
Output Voltage Low
Output Voltage Level
Frequency Stability over Temperature
Frequency vs. Temperature Slope
Dynamic Frequency Change to
Temperature Ramp
Initial Tolerance
24-hour holdover stability
Hysteresis Over Temperature
Symbol
F
DC
Tr, Tf
VOH
VOL
V_out
F_stab
ΔF/ΔT
F_dynamic
F_init
F_24_Hold
F_hys
Min.
60.000001
45
–
90%
–
0.8
-0.1
–
–
-1
-0.28
–
–
–
Supply Voltage Sensitivity
Output Load Sensitivity
One-Day Aging
One-Year Aging
20-Year Aging
Frequency Stability over Temperature
Frequency vs. Temperature Slope
Dynamic Frequency Change during
Temperature Ramp
Initial Tolerance
24-hour holdover
Supply Voltage Sensitivity
Output Load Sensitivity
One-Day Aging
One-Year Aging
20-Year Total Stability
Start-up Time
First Pulse Accuracy
F_Vdd
F_load
F_1d
F_1y
F_20y
F_stab
ΔF/ΔT
F_dynamic
F_init
F_24_Hold
F_Vdd
F_load
F_1d
F_1y
F_20y
T
T_start
T_stability
–
–
–
–
–
–
-0.2
0.25
–
–
-1
-0.32
–
–
–
–
–
-4.6
–
–
±2.5
±2
±1
±3
±1
–
5
10
Typ.
–
–
1
–
–
–
–
±2.5
±0.021
–
–
±15
±15
±10
±2.5
±1
±1
±3
±0.5
±1
–
–
±8
±0.07
–
Max.
220
55
–
–
10%
1.2
+0.1
–
–
+1
+0.28
–
–
–
–
–
–
–
–
–
+0.2
+0.25
–
–
+1
+0.32
–
–
–
–
–
+4.6
–
–
Unit
MHz
%
ns
Vdd
Vdd
V
ppm
ppb/°C
ppb/s
ppm
ppm
ppb
ppb
ppb
ppb
ppb
ppb
ppb
ppm
ppm
ppm
ppm
ppb/°C
ppb/s
ppm
ppm
ppb
ppb
ppb
ppb
ppm
ppm
ms
ms
0.5C/min temperature ramp rate
Initial frequency at 25°C inclusive of solder-down
shift at 48 hours after 2 reflows
Per Stratum 3 definition
Vdd ±5%
LVCMOS output, 15 pF ±10%
Clipped sinewave output, 10kΩ, 10 pF ±10%
After 30-days of continued operation
At 25°C
Stratum 3 per GR-1244
Time to first pulse, measured from the time Vdd
reaches 90% of its final value
Time to first accurate pulse within rated stability,
measured from the time Vdd reaches 90% of its final
value
0.5C/min temperature ramp rate
Initial frequency at 25°C inclusive of solder-down shift
at 48 hours after 2 reflows
Per Stratum 3 definition
-40 to 105C
-40 to 85C
-20 to 70C
Vdd ±5%
LVCMOS output, 15 pF ±10%
Clipped sinewave output, 10kΩ, 10 pF ±10%
After 30-days of continued operation
At 25°C
At 25°C
Referenced to (fmax + fmin)/2 over the specified
temperature range
10% - 90% Vdd
I
OH
= -6 mA, (Vdd = 3.3 V, 3.0 V, 2.8 V, 2.5 V)
I
OL
= 6 mA, (Vdd = 3.3 V, 3.0 V, 2.8 V, 2.5 V)
Measured peak-to-peak swing at any Vdd
Referenced to (max frequency + minimum
frequency)/2 over the specified temperature range
Condition
Frequency Coverage
LVCMOS Output Characteristics
Clipped Sinewave Output Characteristics
Frequency Stability - Stratum 3+ Grade
Frequency Stability - Stratum 3 Grade
Start-up Characteristics
Rev 0.60
Page 3 of 36
www.sitime.com
SiT5357
60 to 220 MHz,
±0.1
to
±0.25
ppm
Elite Platform™ Precision Super-TCXO
Table 2. DC Characteristics
Parameters
Supply Voltage
Symbol
Vdd
Min.
2.25
2.52
2.7
2.97
Current Consumption
OE Disable Current
Operating Temperature Range
IDD
I_od
T_use
–
–
-20
-40
-40
Typ.
2.5
2.8
3.0
3.3
Max.
2.75
3.08
3.3
3.63
Unit
V
V
V
V
mA
mA
°C
°C
°C
PRELIMINARY
Condition
Contact
SiTime
for 2.25V to 3.63V continuous supply
voltage support
Supply Voltage
Current Consumption
–
45
44.5
–
–
–
–
Temperature Range
+70
+85
+105
F = 98.304 MHz, No Load
OE = GND, output is weakly pulled down
Extended Commercial
Industrial. Contact
SiTime
for 105
°C
support
Extended Industrial
Table 3. Input Characteristics
Parameters
Input Impedance
Input High Voltage
Input Low Voltage
Pull Range
PR
Symbol
Z_in
VIH
VIL
Min.
–
70
–
Typ.
100
–
–
Max.
–
–
30
Unit
kΩ
%
%
Internal pull up to Vdd
Condition
Input Characteristics
–
OE Pin
Frequency Tuning Range – Voltage Control or I
2
C mode
±6.25, ±10, ±12.5, ±25, ±50, ±80,
±100, ±125, ±150, ±200, ±400,
±600, ±800, ±1200, ±1600,
±3200
90%
–
10
–
Positive
–
2
ppm
Voltage Control Characteristics
Upper Control Voltage
Lower Control Voltage
Control Voltage Input Impedance
Control Voltage Input Bandwidth
Frequency Change Polarity
Pull Range Linearity
Input Voltage Low
Input Voltage High
Output Voltage Low
Output Current High
Leakage in high impedance mode
Input Hysteresis
Input Capacitance
Rise Time
Fall Time
VIL
VIH
VOL
IOL
I_leak
V_hys
C_in
Tr
Tf
VC_U
VC_L
VC_z
VC_c
–
–
–
10
0.5
–
–
–
–
–
–
–
–
–
–
–
–
10%
–
–
–
0.3
–
0.4
–
24
0.4
0.3
3
120
60
75
Vdd
Vdd
MΩ
kHz
%
V
V
V
mA
µA
V
V
pF
ns
ns
ns
Vdd = 3.3V, 30% to 70%
Vdd = 2.5V, 30% to 70%
0.1 Vdd< VOUT < 0.9 Vdd
Vdd = 3.3V
Vdd = 2.5V
Contact
SiTime
for other input bandwidth options
I C Interface Characteristics, 1 MHz, 200 Ohm, 550 pF (Max I
2
C Bus Load)
–
0.7
–
21
5.5
0.2
0.2
–
–
30
40
Rev 0.60
Page 4 of 36
www.sitime.com
SiT5357
60 to 220 MHz,
±0.1
to
±0.25
ppm
Elite Platform™ Precision Super-TCXO
Table 4. Jitter & Phase Noise
Parameters
RMS Phase Jitter (random)
T_phj
–
Spurs
RMS Period Jitter
Peak Cycle-to-Cycle Jitter
1 Hz offset
10 Hz offset
100 Hz offset
1 kHz offset
10 kHz offset
100 kHz offset
1 MHz offset
5 MHz offset
T_jitt
T_jitt_cc
–
–
–
–
–
–
–
–
–
–
–
0.30
-94
2
10
-54
-82
-104
-126
-132
-135
-149
-155
–
–
–
–
Phase Noise
–
–
–
–
–
–
–
–
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps
dBc
ps
ps
Symbol
Min.
Typ.
Max.
Jitter
–
0.30
–
ps
Unit
PRELIMINARY
Condition
f = 98.304 MHz, Integration bandwidth = 12 kHz to 20
MHz
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20
MHz
f = 98.304 MHz, 12 kHz to 5 MHz offsets
f = 98.304 MHz per JESD65 standard
f = 98.304 MHz per JESD65 standard
f = 98.304 MHz, TCXO and DCTCXO modes, and
VCTCXO mode with ±6.25 ppm pull range
Table 5. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
Continuous Power Supply Voltage Range (Vdd)
Human Body Model (HBM) ESD Protection
Soldering Temperature (follow standard Pb-free
soldering guidelines)
Junction Temperature
[1]
Note:
1. Exceeding this temperature for an extended period of time may damage the device.
New high-precision clock chip RTL-4553[ZT] To facilitate everyone to read the original program, the original URL is given: [url]http://www.avrw.com/article/art_105_421.htm[/url] [b]Abstract: [/b]Intro...
[color=#555555]This is the network protocol stack used for video encoders using TI's DM642. The source code is available for download on TI's official website. There are also some technical documents ...
Hello, Teacher Xia:I am a senior student and I am about to start my graduation project. I have a topic about research and design of broadband DC amplifier based on FPGA. I don't know where to start. I...
[color=black] [/color] [color=black]Unlike a certain power generator that's set to rewrite science[/color], this sugar cube-sized miniature generator developed by the University of Southampton uses si...
TE2440 development board is another product based on ARM920T platform developed by Feiling Embedded Technology Co., Ltd. TE2440 development board has 6-layer board design and carefully optimized routi...
As medical equipment develops towards intelligence, miniaturization, serialization, digitization, and multi-functions, the logic control devices in medical equipment have also evolved from medium- a...[Details]
In some applications, such as data loggers, it is desirable to have multiplexed analog outputs. When only a single output is active at a time, a voltage-output DAC">digital-to-analog converter (DAC) a...[Details]
As a single-host multi-slave bus system, the number of slave devices that can be connected to a 1-Wire bus is almost unlimited. In order to avoid logical conflicts, the 1-Wire bus interfaces of all...[Details]
Today's mobile phone production testing faces an increasingly complex environment, with challenges of multiple frequency bands and multiple standards, pressure on production test speed, and pressur...[Details]
When you hear the word digital TV, you may feel fresh and excited, but when it comes to what digital TV is and what it can bring us, you may still be confused. You must be very eager to understa...[Details]
Complex circuits and 3D EM simulation tools have reached a point where complex system-level behavior can be simulated before fabrication. Performing EM simulations simultaneously with circuit simul...[Details]
summary
Theoretically explains how to set up a PFC boost regulator using a current sensing transformer with the UCC3817 control IC.
1. Schematic
The schematic diagram is show...[Details]
In order to meet the requirements of video systems, industrial and medical display and video transmission applications such as eliminating the limitation of long connection cables, increasing data ...[Details]
A well-designed electronic load is not designed just for use in the lab; it should be carefully designed and built to test actual power systems. This is true for military portable systems, such as ...[Details]
1. Introduction
The UCC28051 reference design is a 100W offline AC/DC voltage converter with power factor correction (PFC). This power module design is intended to illustrate how to proper...[Details]
From the moment AVS video was born, scientists and engineers have been working tirelessly to reduce the size of audio and video bitstreams. Various advanced video compression algorithms have emerge...[Details]
Preface
In the analog era, due to the unchanged specifications and relatively simple device connections, as well as users' low requirements for image quality, the relatively simple environment...[Details]
introduction
In engineering practice, ultrasonic waves are often used to measure distances because of their strong directivity, slow energy consumption, and long propagation distance in th...[Details]
1. Introduction
The intelligent detector discussed in this paper is an integrated semiconductor photodetector. Compared with traditional semiconductor photosensitive devices, its most ...[Details]
With the rapid development of network technology and information communication, network economy and knowledge economy are no longer the exclusive domains of IT and other high-tech industries. The i...[Details]
MCU
京公网安备 11010802033920号
EEWORLD
