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PI6C2405A-1WE

Description
6C SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
Categorylogic    logic   
File Size304KB,7 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Environmental Compliance
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PI6C2405A-1WE Overview

6C SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8

PI6C2405A-1WE Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerPericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
Is SamacsysN
series6C
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times5
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
propagation delay (tpd)0.3 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.2 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN (787)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3.9 mm
minfmax133 MHz
Base Number Matches1
PI6C2405A
Zero-Delay Clock Buffer
Features
Maximum rated frequency: 133 MHz
Low cycle-to-cycle jitter
Input to output delay, less than 300ps
Internal feedback allows outputs to be synchronized
to the clock input
5V tolerant input*
Spread spectrum clock ready
Operates at 3.3V V
DD
Packaging (Pb-free & Green available):
-8-pin, 150-mil SOIC (W)
-8-pin, 173-mil TSSOP (L)
Description
The PI6C2405A is a PLL based, zero-delay buffer, with the ability
to distribute five outputs of up to 133MHz at 3.3V. All the outputs
are distributed from a single clock input CLKIN and output OUT0
performs zero delay by connecting a feedback to PLL.
An internal feedback on OUT0 is used to synchronize the out-
puts to the input; the relationship between loading of this signal
and the outputs determines the input-output delay. PI6C2405A
is able to track spread spectrum clocking for EMI reduction.
PI6C2405A is characterized for both commercial and industrial
operation.
PI6C2405A-1H is a high-drive version of PI6C2405A-1
* CLKIN must reference the same voltage thresholds for the PLL to
deliver zero delay skewing
Block Diagram
Pin Configuration
CLKIN
PLL
OUT
0
OUT
1
OUT
2
OUT
3
CLKIN
OUT
2
OUT
1
GND
1
2
3
4
8
7
6
5
OUT
0
OUT
4
V
DD
OUT
3
PI6C2405A(–1, –1H)
OUT
4
Pin Description
Pin
1
2, 3, 5, 7
4
6
8
Signal
CLKIN
OUT[1-4]
GND
V
DD
OUT0
Description
Input clock reference frequency (weak pull-down)
Clock Outputs
Ground
3.3V Supply
Clockoutput, internal PLL feedback (weak pull-down)
1
PS8592D
09/22/04

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